Bridge interconnection with layered interconnect structures
US-2025015004-A1 · Jan 9, 2025 · US
This page is not indexed by search engines while we improve data quality.
Zhang Qinglei patents
Zhang Qinglei is listed as an inventor on 35 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Zhang Qinglei |
| Total patents | 35 |
| First publication | Sep 29, 2015 |
| Latest publication | Jan 9, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Bridge interconnection with layered interconnect structures
US-12132002-B2 · Oct 29, 2024 · US
Bridge interconnection with layered interconnect structures
US-2024014138-A1 · Jan 11, 2024 · US
Bridge interconnection with layered interconnect structures
US-11694960-B2 · Jul 4, 2023 · US
Bridge interconnection with layered interconnect structures
US-2021384129-A1 · Dec 9, 2021 · US
Integrated circuit package substrate
US-11166379-B2 · Nov 2, 2021 · US
Bridge interconnection with layered interconnect structures
US-11133257-B2 · Sep 28, 2021 · US
Integrated circuit package substrate
US-10770387-B2 · Sep 8, 2020 · US
Bridge interconnection with layered interconnect structures
US-2020043852-A1 · Feb 6, 2020 · US
Bridge interconnection with layered interconnect structures
US-10475745-B2 · Nov 12, 2019 · US
Recent patents
Latest publications not already listed above.
Integrated circuit package substrate
US-2019335591-A1 · Oct 31, 2019 · US
Integrated circuit package substrate
US-2019304892-A1 · Oct 3, 2019 · US
Integrated circuit package substrate
US-10390438-B2 · Aug 20, 2019 · US
Integrated circuit package substrate
US-10325843-B2 · Jun 18, 2019 · US
Bridge interconnection with layered interconnect structures
US-2019013271-A1 · Jan 10, 2019 · US
Bridge interconnection with layered interconnect structures
US-10103103-B2 · Oct 16, 2018 · US
Integrated circuit package substrate
US-2018138118-A1 · May 17, 2018 · US
Integrated circuit package substrate
US-2018098436-A1 · Apr 5, 2018 · US
Integrated circuit package substrate
US-9831169-B2 · Nov 28, 2017 · US
Integrated circuit package substrate
US-9832883-B2 · Nov 28, 2017 · US
Low z-height package assembly
US-9735120-B2 · Aug 15, 2017 · US
Bridge interconnection with layered interconnect structures
US-2017207168-A1 · Jul 20, 2017 · US
Bridge interconnection with layered interconnect structures
US-9640485-B2 · May 2, 2017 · US
Integrated circuit package substrate
US-2016379923-A1 · Dec 29, 2016 · US
Integrated circuit package substrate
US-9508636-B2 · Nov 29, 2016 · US
Coreless substrate with passive device pads
US-9502336-B2 · Nov 22, 2016 · US
Methods of forming substrate microvias with anchor structures
US-9449923-B2 · Sep 20, 2016 · US
Methods of forming substrate microvias with anchor structures
US-2016104679-A1 · Apr 14, 2016 · US
Enabling package-on-package (PoP) pad surface finishes on bumpless build-up layer (BBUL) package
US-9299602-B2 · Mar 29, 2016 · US
Methods of forming substrate microvias with anchor structures
US-9245795-B2 · Jan 26, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 35 |
| Zhang Qinglei | 2 |
| Zhang Chong | 1 |
| Lotz Stefanie M | 1 |
| Boyapati Sri Ranga | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W90/724 | 32 |
| H10W72/252 | 30 |
| H10W72/072 | 27 |
| H10W72/07236 | 27 |
| H10W70/618 | 24 |