Systems and techniques for accessing multiple memory cells concurrently
US-2025266088-A1 · Aug 21, 2025 · US
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Pio Federico patents
Pio Federico is listed as an inventor on 43 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Pio Federico |
| Total patents | 43 |
| First publication | Feb 12, 2015 |
| Latest publication | Aug 21, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Auto-referenced memory cell read techniques
US-12277969-B2 · Apr 15, 2025 · US
Systems and techniques for accessing multiple memory cells concurrently
US-12249370-B2 · Mar 11, 2025 · US
Semiconductor packages with patterns of die-specific information
US-2025054776-A1 · Feb 13, 2025 · US
Auto-referenced memory cell read techniques
US-2024386956-A1 · Nov 21, 2024 · US
Semiconductor packages with patterns of die-specific information
US-12131916-B2 · Oct 29, 2024 · US
Auto-referenced memory cell read techniques
US-12009028-B2 · Jun 11, 2024 · US
Systems and techniques for accessing multiple memory cells concurrently
US-2024013833-A1 · Jan 11, 2024 · US
Systems and techniques for accessing multiple memory cells concurrently
US-11705194-B2 · Jul 18, 2023 · US
Semiconductor packages with indications of die-specific information
US-2023121141-A1 · Apr 20, 2023 · US
Recent patents
Latest publications not already listed above.
Semiconductor packages with indications of die-specific information
US-11532490-B2 · Dec 20, 2022 · US
Systems and techniques for accessing multiple memory cells concurrently
US-2022336013-A1 · Oct 20, 2022 · US
Auto-referenced memory cell read techniques
US-2022208262-A1 · Jun 30, 2022 · US
Redundant cloud memory storage for a memory subsystem
US-11360868-B2 · Jun 14, 2022 · US
Systems and techniques for accessing multiple memory cells concurrently
US-11335402-B2 · May 17, 2022 · US
Auto-referenced memory cell read techniques
US-11282574-B2 · Mar 22, 2022 · US
Semiconductor packages with patterns of die-specific information
US-2021257225-A1 · Aug 19, 2021 · US
Semiconductor packages with patterns of die-specific information
US-11031258-B2 · Jun 8, 2021 · US
Semiconductor packages with indications of die-specific information
US-2021057232-A1 · Feb 25, 2021 · US
Semiconductor packages with patterns of die-specific information
US-2021057233-A1 · Feb 25, 2021 · US
Auto-referenced memory cell read techniques
US-2021020239-A1 · Jan 21, 2021 · US
Auto-referenced memory cell read techniques
US-10896727-B2 · Jan 19, 2021 · US
Redundant cloud memory storage for a memory subsystem
US-2020387434-A1 · Dec 10, 2020 · US
Auto-referenced memory cell read techniques
US-2020294586-A1 · Sep 17, 2020 · US
Systems and techniques for accessing multiple memory cells concurrently
US-2020202928-A1 · Jun 25, 2020 · US
Auto-referenced memory cell read techniques
US-10600480-B2 · Mar 24, 2020 · US
Auto-referenced memory cell read techniques
US-2020035297-A1 · Jan 30, 2020 · US
Nonvolatile storage using low latency and high latency memory
US-10452541-B2 · Oct 22, 2019 · US
Auto-referenced memory cell read techniques
US-10431301-B2 · Oct 1, 2019 · US
Auto-referenced memory cell read techniques
US-2019198099-A1 · Jun 27, 2019 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Micron Technology Inc | 40 |
| Intel Corp | 3 |
| Pio Federico | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G11C13/003 | 22 |
| G11C13/0004 | 22 |
| G11C13/004 | 22 |
| H10N70/231 | 17 |
| H01L45/06 | 14 |