Redundant cloud memory storage for a memory subsystem

US2020387434A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020387434-A1
Application numberUS-201916434602-A
CountryUS
Kind codeA1
Filing dateJun 7, 2019
Priority dateJun 7, 2019
Publication dateDec 10, 2020
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for managing memory element failures in a memory subsystem is described. The method includes detecting, by the memory subsystem, a failed memory element in the memory subsystem and transmitting a redundant memory request based on detection of the failed memory element. The redundant memory request seeks to utilize memory storage in an external storage system in place of the failed memory element in the memory subsystem. Thereafter, the memory subsystem receives, from the external storage system, a redundant memory request confirmation, which indicates that the redundant memory request has been fulfilled and includes an address of a location in the external storage system. In response to receipt of the redundant memory request confirmation, the memory subsystem updates memory management information to map a logical address, which was previously mapped to the failed memory element, to the location in the external storage system.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method for managing memory element failures in a memory subsystem, the method comprising: detecting, by the memory subsystem, a failed memory element in the memory subsystem; transmitting, by the memory subsystem, a redundant memory request based on detection of the failed memory element, wherein the redundant memory request seeks to utilize memory storage in an external storage system in place of the failed memory element in the memory subsystem; receiving, by the memory subsystem from the external storage system, a redundant memory request confirmation, which indicates that the redundant memory request has been fulfilled and includes an address of a location in the external storage system; and updating, by the memory subsystem in response to receipt of the redundant memory request confirmation, memory management information to map a logical address, which was previously mapped to the failed memory element, to the location in the external storage system. 2 . The method of claim 1 , further comprising: receiving, by the memory subsystem, a host memory access request that includes the logical address; determining, by the memory subsystem, that the logical address corresponds to the location in the external storage system; and transmitting, by the memory subsystem, an external memory access request to fulfill the host memory access request in response to determining that the logical address corresponds to the location in the external storage system. 3 . The method of claim 2 , wherein the memory subsystem determines that the logical address corresponds to the location in the external storage system based on the memory management information, and wherein the memory management information is a table that maps logical addresses to (1) physical addresses in the memory subsystem and (2) locations in the external storage system. 4 . The method of claim 1 , wherein the transmitting the redundant memory request is performed in response to determining that a local spare memory element is not available to replace the failed memory element. 5 . The method of claim 1 , wherein the memory subsystem transmits the redundant memory request to a host system communicatively coupled to the memory subsystem, and wherein the host system is to transmit the redundant memory request to the external storage system on behalf of the memory subsystem via a network interface of the host system. 6 . The method of claim 1 , wherein the failed memory element is a memory cell, a managed unit, or a logical block. 7 . The method of claim 1 , wherein the redundant memory request is transmitted in response to determining that associated data of the failed memory element is high-latency data. 8 . A system comprising: a plurality of memory components; and a processing device, operatively coupled with the plurality of memory components, to: transmit a redundant memory request based on detection of a failed memory element in the plurality of memory components, wherein the redundant memory request seeks to utilize an external storage system in place of the failed memory element in the plurality of memory components, receive, from the external storage system, a redundant memory request confirmation, which indicates that the redundant memory request has been fulfilled and includes an address of a location in the external storage system, and update, in response to receipt of the redundant memory request confirmation, memory management information to include the address of the location in the external storage system. 9 . The system of claim 8 , wherein the processing device is further to: receive a host memory access request that includes a logical address, which is mapped in the memory management information to the address of the location in the external storage system; determine that the logical address corresponds to the location in the external storage system; and transmit an external memory access request to fulfill the host memory access request in response to determining that the logical address corresponds to the location in the external storage system. 10 . The system of claim 9 , wherein the processing device determines that the logical address corresponds to the location in the external storage system based on the memory management information, and wherein the memory management information is a table that maps logical addresses to (1) physical addresses in the plurality of memory components and (2) locations in the external storage system. 11 . The system of claim 8 , wherein the transmitting the redundant memory request is performed in response to determining that a local spare memory element is not available to replace the failed memory element. 12 . The system of claim 8 , wherein the processing device transmits the redundant memory request to a host system communicatively coupled to the system, and wherein the host system is to transmit the redundant memory request to the external storage system on behalf of the system via a network interface of the host system. 13 . The system of claim 8 , wherein the memory element is a memory cell, a managed unit, or a logical block. 14 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to: detect a failed memory element in a memory subsystem; transmit a redundant memory request based on detection of the failed memory element, wherein the redundant memory request seeks to utilize memory storage in an external storage system in place of the failed memory element in the memory subsystem; receive, from the external storage system, a redundant memory request confirmation, which indicates that the redundant memory request has been fulfilled and includes an address of a location in the external storage system; and update, in response to receipt of the redundant memory request confirmation, memory management information to map a logical address, which was previously mapped to the failed memory element, to the location in the external storage system. 15 . The non-transitory computer-readable medium of claim 14 , wherein the processing device is further to: receive a host memory access request that includes the logical address; determine that the logical address corresponds to the location in the external storage system; and transmit an external memory access request to fulfill the host memory access request in response to determining that the logical address corresponds to the location in the external storage system. 16 . The non-transitory computer-readable medium of claim 15 , wherein the processing device determines that the logical address corresponds to the location in the external storage system based on the memory management information, and wherein the memory management information is a table that maps logical addresses to (1) physical addresses in the memory subsystem and (2) locations in the external storage system. 17 . The non-transitory computer-readable medium of claim 14 , wherein the transmitting the redundant memory request is performed in response to determining that a local spare memory element is not available to replace the failed memory element. 18 . The non-transitory computer-readable medium of claim 14 , wherein the processing device is to transmit the redundant memory request to a host system communicatively coupled to the processing device, and wherein the host system is to transmit the redundant memory request to the external storage system on behalf of

Assignees

Inventors

Classifications

  • Logical to physical mapping or translation of blocks or pages · CPC title

  • G11C29/835Primary

    with roll call arrangements for redundant substitutions · CPC title

  • in block erasable memory, e.g. flash memory · CPC title

  • with substitution of defective spares · CPC title

  • Redundant storage or storage space (G06F11/2056 takes precedence) · CPC title

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What does patent US2020387434A1 cover?
A method for managing memory element failures in a memory subsystem is described. The method includes detecting, by the memory subsystem, a failed memory element in the memory subsystem and transmitting a redundant memory request based on detection of the failed memory element. The redundant memory request seeks to utilize memory storage in an external storage system in place of the failed memo…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification G11C29/835. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Dec 10 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).