Hybrid active-field gap extended drain MOS transistor
US-11482613-B2 · Oct 25, 2022 · US
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Pendharkar Sameer P patents
Pendharkar Sameer P is listed as an inventor on 47 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Pendharkar Sameer P |
| Total patents | 47 |
| First publication | Jul 2, 2015 |
| Latest publication | Oct 25, 2022 |
Notable patents
Publications ranked by popularity score, then publication date.
Transistor having double isolation with one floating isolation
US-10937905-B2 · Mar 2, 2021 · US
Integrated trench capacitor
US-10903306-B2 · Jan 26, 2021 · US
Integrated high-side driver for P-N bimodal power device
US-10601422-B2 · Mar 24, 2020 · US
Structures to avoid floating resurf layer in high voltage lateral devices
US-10319809-B2 · Jun 11, 2019 · US
Hybrid active-field gap extended drain mos transistor
US-2019172930-A1 · Jun 6, 2019 · US
Integrated Trench Capacitor
US-2019051721-A1 · Feb 14, 2019 · US
Hybrid active-field gap extended drain MOS transistor
US-10205001-B2 · Feb 12, 2019 · US
Integrated trench capacitor
US-10134830-B2 · Nov 20, 2018 · US
P-N bimodal transistors
US-10121891-B2 · Nov 6, 2018 · US
Recent patents
Latest publications not already listed above.
Diluted drift layer with variable stripe widths for power transistors
US-9985028-B2 · May 29, 2018 · US
Structures to avoid floating resurf layer in high voltage lateral devices
US-2018108729-A1 · Apr 19, 2018 · US
Integrated high-side driver for p-n bimodal power device
US-2018097517-A1 · Apr 5, 2018 · US
Integrated Trench Capacitor
US-2018076277-A1 · Mar 15, 2018 · US
Structures to avoid floating RESURF layer in high voltage lateral devices
US-9876071-B2 · Jan 23, 2018 · US
Poly sandwich for deep trench fill
US-9865691-B2 · Jan 9, 2018 · US
Integrated high-side driver for P-N bimodal power device
US-9843322-B2 · Dec 12, 2017 · US
High voltage multiple channel LDMOS
US-9806074-B2 · Oct 31, 2017 · US
Integrated High-Side Driver For P-N Bimodal Power Device
US-2017264289-A1 · Sep 14, 2017 · US
Diluted drift layer with variable stripe widths for power transistors
US-2017221896-A1 · Aug 3, 2017 · US
High breakdown n-type buried layer
US-9673273-B2 · Jun 6, 2017 · US
Diluted drift layer with variable stripe widths for power transistors
US-9653577-B2 · May 16, 2017 · US
Poly sandwich for deep trench fill
US-2017125528-A1 · May 4, 2017 · US
Implant profiling with resist
US-9633849-B2 · Apr 25, 2017 · US
Hybrid active-field gap extended drain MOS transistor
US-9608088-B2 · Mar 28, 2017 · US
P-n bimodal transistors
US-2017084738-A1 · Mar 23, 2017 · US
Poly sandwich for deep trench fill
US-9583579-B2 · Feb 28, 2017 · US
P-N bimodal conduction resurf LDMOS
US-9543299-B1 · Jan 10, 2017 · US
Hybrid active-field gap extended drain mos transistor
US-2016343852-A1 · Nov 24, 2016 · US
Diluted drift layer with variable stripe widths for power transistors
US-2016336427-A1 · Nov 17, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Texas Instruments Inc | 47 |
| Pendharkar Sameer P | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10D30/65 | 23 |
| H10P30/204 | 19 |
| H10P30/21 | 19 |
| H10D30/0281 | 19 |
| H01L29/7816 | 19 |