Embedded photonic integrated circuits
US-12571959-B2 · Mar 10, 2026 · US
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Mahajan Ravindranath V patents
Mahajan Ravindranath V is listed as an inventor on 114 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Mahajan Ravindranath V |
| Total patents | 114 |
| First publication | Jan 27, 2015 |
| Latest publication | Mar 10, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
High bandwidth optical interconnection architectures
US-12517314-B2 · Jan 6, 2026 · US
Multiple die package using an embedded bridge connecting dies
US-12519062-B2 · Jan 6, 2026 · US
BGA stiffener attachment with low Eolife adhesive strength at high solder joint stress area generated from enabling load
US-12494441-B2 · Dec 9, 2025 · US
Multi-die bridge assemblies and methods for three-dimensional packaging
US-2025266395-A1 · Aug 21, 2025 · US
Interconnect architecture with silicon interposer and EMIB
US-12347783-B2 · Jul 1, 2025 · US
Nested interposer with through-silicon via bridge die
US-2025118647-A1 · Apr 10, 2025 · US
Self-diffusing liquid metal interconnect architectures enabling snap-on room temperature assembly
US-2025112190-A1 · Apr 3, 2025 · US
Embedded bridge with through-silicon vias
US-2025046680-A1 · Feb 6, 2025 · US
Nested interposer with through-silicon via bridge die
US-12218040-B2 · Feb 4, 2025 · US
Recent patents
Latest publications not already listed above.
Multi-die ultrafine pitch patch architecture and method of making
US-2025029929-A1 · Jan 23, 2025 · US
Photonic integrated circuit within a cavity of interposer
US-2025004223-A1 · Jan 2, 2025 · US
Embedded bridge die with through-silicon vias
US-12159813-B2 · Dec 3, 2024 · US
Multi-die ultrafine pitch patch architecture of interconnect bridge over glass layer and method of making
US-12142568-B2 · Nov 12, 2024 · US
Embedded photonic integrated circuits
US-2024329301-A1 · Oct 3, 2024 · US
Patch on interposer architecture for low cost optical co-packaging
US-12061371-B2 · Aug 13, 2024 · US
Liquid metal wells for interconnect architectures
US-2024213156-A1 · Jun 27, 2024 · US
Thin film capacitors (tfcs) in etched back deep via
US-2024213132-A1 · Jun 27, 2024 · US
Interconnect architecture with silicon interposer and emib
US-2024145395-A1 · May 2, 2024 · US
Dual sided embedded passives via panel level thermal compression bonding
US-2024113000-A1 · Apr 4, 2024 · US
Glass die-to-die bridge and interposer for die first architecture
US-2024071935-A1 · Feb 29, 2024 · US
Angled baffles on glass edge for cavitation protection
US-2024063069-A1 · Feb 22, 2024 · US
Package architectures with glass cores for thickness reduction and 3d integration
US-2024063203-A1 · Feb 22, 2024 · US
Interconnect architecture with silicon interposer and EMIB
US-11901299-B2 · Feb 13, 2024 · US
Distributed semiconductor die and package architecture
US-11894359-B2 · Feb 6, 2024 · US
Full package vapor chamber with IHS
US-11832419-B2 · Nov 28, 2023 · US
Dual-sided co-packaged optics for high bandwidth networking applications
US-11830863-B2 · Nov 28, 2023 · US
Multiple die package using an embedded bridge connecting dies
US-2023352412-A1 · Nov 2, 2023 · US
Microelectronic structure including die bonding film between embedded die and surface of substrate cavity, and method of making same
US-2023317619-A1 · Oct 5, 2023 · US
Bga stiffener attachment with low eolife adhesive strength at high solder joint stress area generated from enabling load
US-2023307379-A1 · Sep 28, 2023 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 114 |
| Mahajan Ravindranath V | 4 |
| Guzek John S | 2 |
| Swaminathan Rajasekaran | 1 |
| Gomes Wilfred | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W90/00 | 80 |
| H10W90/724 | 75 |
| H10W70/611 | 60 |
| H10W70/618 | 52 |
| H10W90/401 | 50 |