Apparatus including soi cmos transistor pair
US-2026040690-A1 · Feb 5, 2026 · US
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Pulugurtha Srinivas patents
Pulugurtha Srinivas is listed as an inventor on 72 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Pulugurtha Srinivas |
| Total patents | 72 |
| First publication | Feb 26, 2015 |
| Latest publication | Feb 5, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Memory device having 2-transistor vertical memory cell
US-2025240951-A1 · Jul 24, 2025 · US
Memory device including calibration operation and transistor having adjustable threshold voltage
US-2025126773-A1 · Apr 17, 2025 · US
Field effect transistors with gate fins and method of making the same
US-12279445-B2 · Apr 15, 2025 · US
Memory device having 2-transistor vertical memory cell
US-12232311-B2 · Feb 18, 2025 · US
Memory device including calibration operation and transistor having adjustable threshold voltage
US-12178033-B2 · Dec 24, 2024 · US
Memory devices with integrated fdsoi transistor
US-2024381628-A1 · Nov 14, 2024 · US
Vertical 2-transistor memory cell
US-2024373619-A1 · Nov 7, 2024 · US
Asymmetric transistor devices
US-2024284663-A1 · Aug 22, 2024 · US
Memory device having 2-transistor vertical memory cell
US-2024196604-A1 · Jun 13, 2024 · US
Recent patents
Latest publications not already listed above.
Vertical 2-transistor memory cell
US-11985806-B2 · May 14, 2024 · US
Integrated assemblies
US-11935960-B2 · Mar 19, 2024 · US
Memory device having 2-transistor vertical memory cell
US-11839073-B2 · Dec 5, 2023 · US
Three-dimensional memory device with wiggled drain-select-level isolation structure and methods of manufacturing the same
US-11805649-B2 · Oct 31, 2023 · US
Apparatuses including transistors, and related methods, memory devices, and electronic systems
US-11653488-B2 · May 16, 2023 · US
Integrated assemblies and methods of forming integrated assemblies
US-11626488-B2 · Apr 11, 2023 · US
Field effect transistors with gate fins and method of making the same
US-2023082824-A1 · Mar 16, 2023 · US
Integrated assemblies having conductive material along three of four sides around active regions, and methods of forming integrated assemblies
US-11600535-B2 · Mar 7, 2023 · US
Integrated assemblies having shield lines between digit lines, and methods of forming integrated assemblies
US-11581317-B2 · Feb 14, 2023 · US
Memory device having 2-transistor vertical memory cell
US-11581319-B2 · Feb 14, 2023 · US
Memory device having 2-transistor vertical memory cell
US-2023030364-A1 · Feb 2, 2023 · US
Integrated assemblies, and methods of forming integrated assemblies
US-11563010-B2 · Jan 24, 2023 · US
Metal insulator semiconductor (MIS) contact in three dimensional (3D) vertical memory
US-11538809-B2 · Dec 27, 2022 · US
Integrated Assemblies
US-2022352383-A1 · Nov 3, 2022 · US
Memory device including calibration operation and transistor having adjustable threshold voltage
US-2022310620-A1 · Sep 29, 2022 · US
Integrated assemblies
US-11411118-B2 · Aug 9, 2022 · US
Integrated assemblies and methods of forming integrated assemblies
US-11335775-B2 · May 17, 2022 · US
Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages
US-11302703-B2 · Apr 12, 2022 · US
Integrated Assemblies
US-2022077320-A1 · Mar 10, 2022 · US
Integrated Assemblies and Methods of Forming Integrated Assemblies
US-2022069083-A1 · Mar 3, 2022 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Micron Technology Inc | 68 |
| Sandisk Technologies Llc | 4 |
| Sandisk Technologies Inc | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10B12/05 | 31 |
| H10B12/315 | 25 |
| H10B12/50 | 23 |
| H10B12/30 | 22 |
| H10B12/482 | 20 |