Integrated Assemblies

Patent metadata

Field	Value
Publication number	US-2022352383-A1
Application number	US-202217864244-A
Country	US
Kind code	A1
Filing date	Jul 13, 2022
Priority date	Sep 10, 2020
Publication date	Nov 3, 2022
Grant date	—

Abstract

Some embodiments include integrated memory. The integrated memory includes a first series of first conductive structures and a second series of conductive structures. The first conductive structures extend along a first direction. The second conductive structures extend along a second direction which crosses the first direction. Pillars of semiconductor material extend upwardly from the first conductive structures. Each of the pillars includes a lower source/drain region, an upper source/drain region, and a channel region between the lower and upper source/drain regions. The lower source/drain regions are coupled with the first conductive structures. Insulative material is adjacent sidewall surfaces of the pillars. The insulative material includes ZrO x , where x is a number greater than 0. The second conductive structures include gating regions which are spaced from the channel regions by at least the insulative material. Storage elements are coupled with the upper source/drain regions.

First claim

I/we claim,:

1 . Integrated memory, comprising:
a first series of first conductive structures; the first conductive structures extending along a first direction; pillars of semiconductor material extending upwardly from the first conductive structures; each of the pillars including a lower source/drain region, an upper source/drain region, and a channel region between the lower and upper source/drain regions; the lower source/drain regions being coupled with the first conductive structures; insulative material adjacent sidewall surfaces of the pillars, the insulative material comprising ZrO where the chemical formula indicates primary constituents rather than a specific stoichiometry; a second series of second conductive structures; the second conductive structures extending along a second direction which crosses the first direction; the second conductive structures comprising gating regions operatively proximate the channel regions and spaced from the channel regions by at least the insulative material; and storage elements coupled with the upper source/drain regions.

2 . The integrated memory of claim 1 comprising yttrium throughout the ZrO.

3 . The integrated memory of claim 1 wherein the first conductive structures are digit lines coupled with sense-amplifier-circuitry.

4 . The integrated memory of claim 1 wherein the second conductive structures are wordlines coupled with wordline-driver-circuitry.

5 . The integrated memory of claim 1 wherein the storage elements include capacitors.

6 . The integrated memory of claim 5 wherein the capacitors are non-ferroelectric capacitors.

7 . The integrated memory of claim 5 wherein the capacitors are ferroelectric capacitors.

8 . The integrated memory of claim 1 wherein the semiconductor material comprises InGaZnO, where the chemical formula indicates primary constituents rather than a specific stoichiometry.

9 . The integrated memory of claim 1 wherein the insulative material includes AlO in addition to the ZrO, where the chemical formulas indicate primary constituents rather than a specific stoichiometry.

10 . The integrated memory of claim 9 comprising yttrium throughout the AlO and the ZrO.

11 . The integrated memory of claim 1 wherein the second conductive structures comprise ruthenium.

12 . The integrated memory of claim 1 wherein the second conductive structures comprise a first region laterally adjacent a second region; and wherein the first region comprises the ruthenium and the second region comprises TaN, where the chemical formula indicates primary constituents rather than a specific stoichiometry.

13 . The integrated memory of claim 1 wherein the first region is directly against the insulative material.

14 . The integrated memory of claim 1 wherein the second region is directly against the insulative material.

15 . Integrated memory comprising a transistor, the transistor comprising:
an active region including a post structure comprising semiconductor material, the post structure having opposing sidewalls extending along an entirety of a height of the post structure and including a channel region between a first source/drain region and a second source/drain region, an entirety of each of the first source/drain region and the second source/drain region being within the post structure; and an insulative material adjacent the active region and extending along an entirety of the opposing sidewalls, the insulative material comprising ZrO where the chemical formula indicates primary constituents rather than a specific stoichiometry.

16 . The integrated memory of claim 15 wherein the transistor further comprises a conductive gating material spaced from the active region by at least the insulative material and being operatively proximate the active region.

17 . The integrated memory of claim 15 comprising yttrium within the ZrO.

18 . The integrated memory of claim 17 wherein the yttrium is present to a concentration within a range of from about 0.5 at % to about 0.05 at %.

19 . The integrated memory of claim 15 wherein the semiconductor material comprises at least one element selected from Group 13 of the periodic table in combination with at least one element selected from Group 16 of the periodic table.

20 . The integrated memory of claim 15 wherein the insulative material is a first insulative material and wherein the semiconductor material laterally surrounds a second insulative material within the post structure.

Assignees

• Micron Technology Inc

Inventors

• Pulugurtha Srinivas
• Yang Litao
• Liu Haitao
• Karda Kamal M

Classifications

• H01L29/78642 Primary

  Electricity · mapped topic

• H01L29/517

  Electricity · mapped topic

• H01L27/11514

  Electricity · mapped topic

• H01L27/10808

  Electricity · mapped topic

• H01L29/4966

  Electricity · mapped topic