Fabrication method of semiconductor package with stacked semiconductor chips
US-11101235-B2 · Aug 24, 2021 · US
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Chen Lu-Yi patents
Chen Lu-Yi is listed as an inventor on 34 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Chen Lu-Yi |
| Total patents | 34 |
| First publication | Feb 5, 2015 |
| Latest publication | Aug 24, 2021 |
Notable patents
Publications ranked by popularity score, then publication date.
Electrical testing method of interposer
US-10950507-B2 · Mar 16, 2021 · US
Method for fabricating electronic package
US-10796970-B2 · Oct 6, 2020 · US
Fabrication method of semiconductor package with stacked semiconductor chips
US-2020152591-A1 · May 14, 2020 · US
Fabrication method of semiconductor package with stacked semiconductor chips
US-10622323-B2 · Apr 14, 2020 · US
Fabrication method of electronic module
US-10461002-B2 · Oct 29, 2019 · US
Method for fabricating electronic package
US-10403570-B2 · Sep 3, 2019 · US
Package structure and fabrication method thereof
US-10242972-B2 · Mar 26, 2019 · US
Method for fabricating electronic package
US-2019057911-A1 · Feb 21, 2019 · US
Fabrication method of electronic package
US-10211082-B2 · Feb 19, 2019 · US
Recent patents
Latest publications not already listed above.
Method for fabricating electronic package
US-2019043798-A1 · Feb 7, 2019 · US
Electronic device
US-10201086-B2 · Feb 5, 2019 · US
Electronic package and fabrication method thereof
US-10141233-B2 · Nov 27, 2018 · US
Electronic package and method for fabricating the same
US-10128178-B2 · Nov 13, 2018 · US
Fabrication method of semiconductor package with stacked semiconductor chips
US-2018261563-A1 · Sep 13, 2018 · US
Electrical testing method of interposer
US-2018254227-A1 · Sep 6, 2018 · US
Semiconductor package with stacked semiconductor chips
US-9997481-B2 · Jun 12, 2018 · US
Interposer and electrical testing method thereof
US-9991178-B2 · Jun 5, 2018 · US
Electronic package and method for fabricating the same
US-2017338173-A1 · Nov 23, 2017 · US
Carrier structure, packaging substrate, electronic package and fabrication method thereof
US-9818635-B2 · Nov 14, 2017 · US
Fabrication method of electronic module
US-2017309534-A1 · Oct 26, 2017 · US
Electronic module and fabrication method thereof
US-9735075-B2 · Aug 15, 2017 · US
Method of fabricating semiconductor package
US-2017148761-A1 · May 25, 2017 · US
Electronic package and fabrication method thereof
US-9601403-B2 · Mar 21, 2017 · US
Electronic package and fabrication method thereof
US-2017047262-A1 · Feb 16, 2017 · US
Carrier structure, packaging substrate, electronic package and fabrication method thereof
US-2017033027-A1 · Feb 2, 2017 · US
Electronic package and fabrication method thereof
US-2017005023-A1 · Jan 5, 2017 · US
Substrate structure with first and second conductive bumps having different widths
US-9515039-B2 · Dec 6, 2016 · US
Substrate structure with first and second conductive bumps having different widths
US-2016322323-A1 · Nov 3, 2016 · US
Package structure and fabrication method thereof
US-2016233194-A1 · Aug 11, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Siliconware Precision Industries Co Ltd | 34 |
| Chen lu yi | 1 |
| Chiu Chi Hsin | 1 |
| Chiu Shih Kuang | 1 |
| Silicon Prec Industries Co Ltd | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W74/019 | 26 |
| H10W90/724 | 23 |
| H10W74/15 | 20 |
| H10W74/142 | 19 |
| H10W70/635 | 19 |