Substrate structure with first and second conductive bumps having different widths

US9515039B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9515039-B2
Application numberUS-201514983738-A
CountryUS
Kind codeB2
Filing dateDec 30, 2015
Priority dateMay 1, 2015
Publication dateDec 6, 2016
Grant dateDec 6, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A substrate structure is provided, which includes a substrate body having a plurality of conductive pads, and a plurality of first conductive bumps and a plurality of second conductive bumps disposed on the conductive pads. Each of the second conductive bumps is less in width than each of the first conductive bumps, and is of a height with respect to the substrate body greater than a height of each of the first conductive bumps with respect to the substrate body. Therefore, the height difference between the first pre-solder layer and the second pre-solder layer after a reflow process can be compensated, and the first conductive bumps and the second conductive bumps thus have a uniform height.

First claim

Opening claim text (preview).

What is claimed is: 1. A substrate structure, comprising: a substrate body having a plurality of conductive pads; a plurality of first conductive bumps disposed on a portion of the plurality of the conductive pads, each of the first conductive bumps containing at least a first conductive material; and a plurality of second conductive bumps disposed on a remaining portion of the plurality of the conductive pads, each of the second conductive bumps containing at least a second conductive material, wherein each of the second conductive bumps is less in width than each of the first conductive bumps, and each of the second conductive bumps is of a height with respect to the substrate body greater than a height of each of the first conductive bumps with respect to the substrate body, and the second conductive material and the first conductive material are reflowed such that the height of each of the second conductive bumps with respect to the substrate body is substantially equal to the height of each of the first conductive bumps with respect to the substrate body. 2. The substrate structure of claim 1 , being a wafer, a chip, an interposer or a packaging substrate. 3. The substrate structure of claim 1 , wherein the first conductive material is a first pre-solder layer formed by copper, nickel, gold, tin, silver or a combination thereof, and the second conductive material is a second pre-solder layer formed by copper, nickel, gold, tin, silver or a combination thereof. 4. The substrate structure of claim 3 , wherein each of the first conductive bumps further includes a first metal layer with the first pre-solder layer formed thereon, and each of the second conductive bumps further includes a second metal layer with the second pre-solder layer formed thereon. 5. The substrate structure of claim 4 , wherein the second metal layer is greater in thickness than the first metal layer. 6. The substrate structure of claim 4 , wherein the first metal layer is greater in melting point than the first pre-solder layer. 7. The substrate structure of claim 4 , wherein the second metal layer is greater in melting point than the second pre-solder layer. 8. The substrate structure of claim 4 , wherein a thickness of the first metal layer is 10% to 90% of a thickness of the first conductive bump. 9. The substrate structure of claim 4 , wherein a thickness of the second metal layer is 10% to 90% of a thickness of the second conductive bump. 10. The substrate structure of claim 1 , wherein the height of the first conductive bump with respect to the substrate body is 10% to 90% of the height of the second conductive bump with respect to the substrate body.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • relative to the surface, e.g. recessed, protruding · CPC title

  • Soldering or alloying · CPC title

  • comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

  • relative to the surface, e.g. recessed, protruding · CPC title

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What does patent US9515039B2 cover?
A substrate structure is provided, which includes a substrate body having a plurality of conductive pads, and a plurality of first conductive bumps and a plurality of second conductive bumps disposed on the conductive pads. Each of the second conductive bumps is less in width than each of the first conductive bumps, and is of a height with respect to the substrate body greater than a height of …
Who is the assignee on this patent?
Siliconware Precision Industries Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W72/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).