Memory module having volatile and non-volatile memory subsystems and method of operation
US-12585581-B2 · Mar 24, 2026 · US
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Bhakta Jayesh R patents
Bhakta Jayesh R is listed as an inventor on 50 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Bhakta Jayesh R |
| Total patents | 50 |
| First publication | Mar 3, 2015 |
| Latest publication | Mar 24, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Multi-mode memory subsystem including control and data modules for buffering and testing
US-12494262-B2 · Dec 9, 2025 · US
Memory module with data buffering
US-12222878-B2 · Feb 11, 2025 · US
Memory module with timing-controlled data buffering
US-2025028660-A1 · Jan 23, 2025 · US
Memory module with local synchronization and method of operation
US-12135644-B2 · Nov 5, 2024 · US
Multi-Mode Memory Module with Data Handlers
US-2024221852-A1 · Jul 4, 2024 · US
Memory module with distributed data buffers
US-11994982-B2 · May 28, 2024 · US
Multi mode memory module with data handlers
US-11862267-B2 · Jan 2, 2024 · US
Memory module having volatile and non-volatile memory subsystems and method of operation
US-2023385192-A1 · Nov 30, 2023 · US
Memory module with timing-controlled data buffering
US-11762788-B2 · Sep 19, 2023 · US
Recent patents
Latest publications not already listed above.
Memory module with local synchronization and method of operation
US-2023236970-A1 · Jul 27, 2023 · US
Memory module having volatile and non-volatile memory subsystems and method of operation
US-11663121-B2 · May 30, 2023 · US
Memory module with local synchronization and method of operation
US-11513955-B2 · Nov 29, 2022 · US
Memory module having volatile and non-volatile memory subsystems and method of operation
US-2022253380-A1 · Aug 11, 2022 · US
Hybrid memory module and system and method of operating the same
US-11243886-B2 · Feb 8, 2022 · US
Memory module with data buffering
US-2021382834-A1 · Dec 9, 2021 · US
Memory module with distributed data buffers
US-2021271593-A1 · Sep 2, 2021 · US
Memory module with data buffering
US-11093417-B2 · Aug 17, 2021 · US
Memory module with local synchronization and method of operation
US-2021240620-A1 · Aug 5, 2021 · US
Memory module with timing-controlled data buffering
US-2021149829-A1 · May 20, 2021 · US
Memory module with controlled byte-wise buffers
US-10949339-B2 · Mar 16, 2021 · US
Memory module with local synchronization and method of operation
US-10884923-B2 · Jan 5, 2021 · US
Memory module with timing-controlled data buffering
US-10860506-B2 · Dec 8, 2020 · US
Memory module with data buffering
US-2020192834-A1 · Jun 18, 2020 · US
Hybrid memory module and system and method of operating the same
US-2020042456-A1 · Feb 6, 2020 · US
Memory module with data buffering
US-10489314-B2 · Nov 26, 2019 · US
Memory module with local synchronization and method of operation
US-2019354480-A1 · Nov 21, 2019 · US
Memory module with timing-controlled data buffering
US-2019347220-A1 · Nov 14, 2019 · US
Multi Mode Memory Module with Data Handlers
US-2019295675-A1 · Sep 26, 2019 · US
Hybrid memory module and system and method of operating the same
US-10380022-B2 · Aug 13, 2019 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Netlist Inc | 50 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G11C5/04 | 39 |
| G06F1/10 | 20 |
| G11C7/1066 | 20 |
| G11C29/023 | 20 |
| G11C29/028 | 20 |