Systems and methods for processor circuits
US-12585602-B2 · Mar 24, 2026 · US
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Langhammer Martin patents
Langhammer Martin is listed as an inventor on 265 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Langhammer Martin |
| Total patents | 265 |
| First publication | Feb 3, 2015 |
| Latest publication | Mar 24, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Systems and methods for structured mixed-precision in a specialized processing block
US-12554464-B2 · Feb 17, 2026 · US
Hazard mitigation for lightweight processor cores
US-12511122-B2 · Dec 30, 2025 · US
Tensor Circuits And Methods For Multiplying With Sparse Weights
US-2025371103-A1 · Dec 4, 2025 · US
FPGA Specialist Processing Block for Machine Learning
US-2025291596-A1 · Sep 18, 2025 · US
Multiplier Circuit with Carry-Based Partial Product Encoding
US-2025251910-A1 · Aug 7, 2025 · US
Vector Processor Architectures
US-2025238232-A1 · Jul 24, 2025 · US
FPGA specialist processing block for machine learning
US-12340219-B2 · Jun 24, 2025 · US
Machine learning training architecture for programmable devices
US-2025199762-A1 · Jun 19, 2025 · US
Lut-free hardware based softmax accelerator
US-2025190523-A1 · Jun 12, 2025 · US
Recent patents
Latest publications not already listed above.
Rank-based dot product circuitry
US-2025123804-A1 · Apr 17, 2025 · US
Simt processor with storage having sets of storage locations corresponding to different threads of a parallel thread group to store data elements output from corresponding sets of registers of a register file
US-2025094378-A1 · Mar 20, 2025 · US
Vector processor architectures
US-12254316-B2 · Mar 18, 2025 · US
Neural network accelerator performing operation with mixed-format weights
US-2025060940-A1 · Feb 20, 2025 · US
Summation and floating point conversion of tensor results
US-2025045017-A1 · Feb 6, 2025 · US
Filtering with Tensor Structures
US-2025021305-A1 · Jan 16, 2025 · US
Rank-based dot product circuitry
US-12197888-B2 · Jan 14, 2025 · US
Modular Multipliers using Hybrid Reduction Techniques
US-2025013431-A1 · Jan 9, 2025 · US
High precision decomposable DSP entity
US-12182534-B2 · Dec 31, 2024 · US
Extended floating-point range processors, methods, systems, and instructions
US-2024419444-A1 · Dec 19, 2024 · US
Programmable integrated circuit underlay
US-2024394448-A1 · Nov 28, 2024 · US
Systems and methods for low latency modular multiplication
US-12135955-B2 · Nov 5, 2024 · US
Floating-Point Dynamic Range Expansion
US-2024345804-A1 · Oct 17, 2024 · US
Instructions for floating point multiplication and addition and conversion employing variable precision
US-2024329991-A1 · Oct 3, 2024 · US
Programmable integrated circuit underlay
US-12086518-B2 · Sep 10, 2024 · US
Efficient dual-path floating-point arithmetic operators
US-12079590-B2 · Sep 3, 2024 · US
Programmable look up table free hardware accelerator and instruction set architecture for activation functions
US-2024289168-A1 · Aug 29, 2024 · US
Integrated circuits with machine learning extensions
US-12056461-B2 · Aug 6, 2024 · US
Floating-point dynamic range expansion
US-12045581-B2 · Jul 23, 2024 · US
Rounding circuitry for floating-point mantissas
US-12020000-B2 · Jun 25, 2024 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 139 |
| Altera Corp | 131 |
| Langhammer Martin | 8 |
| Zheng Leon | 1 |
| Prasad Nitin | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F7/5443 | 92 |
| G06F7/483 | 60 |
| G06F7/4876 | 56 |
| G06F7/485 | 49 |
| G06F7/523 | 43 |