Semiconductor device including superlattice with O18 enriched monolayers

Patent metadata

Field	Value
Publication number	US-12199148-B2
Application number	US-202318213346-A
Country	US
Kind code	B2
Filing date	Jun 23, 2023
Priority date	May 26, 2021
Publication date	Jan 14, 2025
Grant date	Jan 14, 2025

Abstract

A semiconductor device may include a semiconductor layer, and a superlattice adjacent the semiconductor layer and including stacked groups of layers. Each group of layers may include stacked base semiconductor monolayers defining a base semiconductor portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The at least one oxygen monolayer of a given group of layers may include an atomic percentage of 18 O greater than 10 percent.

First claim

That which is claimed is:

1. A semiconductor device comprising:
a dopant blocking layer comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
the at least one oxygen monolayer of at least one given group of layers comprising an atomic percentage of 18 O greater than 10 percent.

2. The semiconductor device of claim 1 wherein the at least one oxygen monolayer comprises an atomic percentage of 18 O greater than 50 percent.

3. The semiconductor device of claim 1 wherein the at least one oxygen monolayer comprises an atomic percentage of 18 O greater than 90 percent.

4. The semiconductor device of claim 1 wherein the at least one oxygen monolayer further comprises 16 O.

5. The semiconductor device of claim 1 wherein the at least one oxygen monolayer of each group of layers comprises an atomic percentage of 18 O greater than 10 percent.

6. The semiconductor device of claim 1 comprising source and drain regions adjacent the dopant blocking layer and defining a channel therebetween, and a gate above the channel.

7. The semiconductor device of claim 1 comprising first and second semiconductor regions on opposing sides of the dopant blocking layer, with the first semiconductor region having a same conductivity type as the second semiconductor region and a different dopant concentration than the second semiconductor region.

8. The semiconductor device of claim 1 comprising a metal layer above the dopant blocking layer.

9. The semiconductor device of claim 1 comprising first and second semiconductor regions on opposing sides of the dopant blocking layer, with the first semiconductor region having a different conductivity type than the second semiconductor region.

10. The semiconductor device of claim 1 wherein the base semiconductor layer comprises silicon.

11. The semiconductor device of claim 1 comprising a semiconductor substrate; and wherein the dopant blocking layer extends in at least one of a lateral and vertical direction relative to the semiconductor substrate.

12. A semiconductor device comprising:
a dopant blocking layer comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
the at least one oxygen monolayer of at least one given group of layers comprising an atomic percentage of 18 O greater than 50 percent.

13. The semiconductor device of claim 12 wherein the at least one oxygen monolayer comprises an atomic percentage of 18 O greater than 90 percent.

14. The semiconductor device of claim 12 wherein the at least one oxygen monolayer comprises 16 O.

15. The semiconductor device of claim 12 wherein the at least one oxygen monolayer of each group of layers comprises an atomic percentage of 18 O greater than 50 percent.

16. The semiconductor device of claim 12 further comprising source and drain regions adjacent the dopant blocking layer and defining a channel therebetween, and a gate above the channel.

17. The semiconductor device of claim 12 comprising first and second semiconductor regions on opposing sides of the dopant blocking layer, with the first semiconductor region having a same conductivity type as the second semiconductor region and a different dopant concentration than the second semiconductor region.

18. The semiconductor device of claim 12 comprising a metal layer above the dopant blocking layer.

19. The semiconductor device of claim 12 comprising first and second semiconductor regions on opposing sides of the dopant blocking layer, with the first semiconductor region having a different conductivity type than the second semiconductor region.

20. The semiconductor device of claim 12 comprising a semiconductor substrate; and wherein the dopant blocking layer extends in at least one of a lateral and vertical direction relative to the semiconductor substrate.

21. A semiconductor device comprising:
a dopant blocking layer comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
the at least one oxygen monolayer of at least one given group of layers comprising an atomic percentage of 18 O greater than 90 percent.

22. The semiconductor device of claim 21 wherein the at least one oxygen monolayer comprises 16 O.

23. The semiconductor device of claim 21 wherein the at least one oxygen monolayer of each group of layers comprises an atomic percentage of 18 O greater than 90 percent.

24. The semiconductor device of claim 21 further comprising source and drain regions adjacent the dopant blocking layer and defining a channel therebetween, and a gate above the channel.

25. The semiconductor device of claim 21 comprising first and second semiconductor regions on opposing sides of the dopant blocking layer, with the first semiconductor region having a same conductivity type as the second semiconductor region and a different dopant concentration than the second semiconductor region.

26. The semiconductor device of claim 21 comprising a metal layer above the dopant blocking layer.

27. The semiconductor device of claim 21 comprising first and second semiconductor regions on opposing sides of the dopant blocking layer, with the first semiconductor region having a different conductivity type than the second semiconductor region.

28. The semiconductor device of claim 21 comprising a semiconductor substrate; and wherein the dopant blocking layer extends in at least one of a lateral and vertical direction relative to the semiconductor substrate.

Assignees

• Atomera Inc

Inventors

• Hytha Marek
• Cody Nyles Wynn
• Weeks Keith Doran

Classifications

• H10D30/751

  having composition variations in the channel regions · CPC title

• H10D30/60

  Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence) · CPC title

• H10D30/601

  having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  (lightly doped source or drain extensions for TFTs H10D30/6715) · CPC title

• H10D64/259

  Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric · CPC title

• H10D64/251

  Source or drain electrodes for field-effect devices · CPC title