Semiconductor devices with enhanced deterministic doping and related methods

Patent metadata

Field	Value
Publication number	US-10170560-B2
Application number	US-201715629012-A
Country	US
Kind code	B2
Filing date	Jun 21, 2017
Priority date	Jun 9, 2014
Publication date	Jan 1, 2019
Grant date	Jan 1, 2019

Abstract

A method for making a semiconductor device may include forming a plurality of stacked groups of layers on a semiconductor substrate, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include implanting a dopant in the semiconductor substrate beneath the plurality of stacked groups of layers in at least one localized region, and performing an anneal of the plurality of stacked groups of layers and semiconductor substrate and with the plurality of stacked groups of layers vertically and horizontally constraining the dopant in the at least one localized region.

First claim

That which is claimed is:

1. A semiconductor device comprising:
a semiconductor substrate;
a plurality of stacked groups of layers on the semiconductor substrate, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; and
a dopant in the semiconductor substrate beneath the plurality of stacked groups of layers in at least one localized region with the plurality of stacked groups of layers vertically and horizontally constraining the dopant in the at least one localized region, the dopant having a fall-off steeper than 3.3 nm/decade.

2. The semiconductor device of claim 1 wherein the at least one localized region comprises a plurality thereof.

3. The semiconductor device of claim 1 wherein the dopant has a fall-off steeper than 3.0 nm/decade.

4. The semiconductor device of claim 1 wherein the plurality of stacked groups of layers comprises laterally-spaced apart stacked groups of layers on the semiconductor substrate; and wherein the dopant is localized in respective localized regions beneath each of the laterally-spaced apart stacked groups of layers.

5. The semiconductor device of claim 1 wherein the dopant comprises at least one of boron and arsenic.

6. The semiconductor device of claim 1 wherein each base semiconductor portion comprises silicon.

7. The semiconductor device of claim 1 wherein each base semiconductor portion comprises germanium.

8. The semiconductor device of claim 1 wherein the at least one non-semiconductor layer comprises oxygen.

9. The semiconductor device of claim 1 wherein the at least one non-semiconductor monolayer comprises a non-semiconductor selected from the group consisting of oxygen, nitrogen, fluorine, and carbon-oxygen.

10. The semiconductor device of claim 1 wherein at least some semiconductor atoms from opposing base semiconductor portions are chemically bound together through the at least one non-semiconductor monolayer therebetween.

11. A semiconductor device comprising:
a semiconductor substrate;
a plurality of stacked groups of layers on the semiconductor substrate, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; and
a dopant in the semiconductor substrate beneath the plurality of stacked groups of layers in at least one localized region with the plurality of stacked groups of layers vertically and horizontally constraining the dopant in the at least one localized region, the dopant having a fall-off steeper than 3.3 nm/decade;
each base semiconductor portion comprising silicon, and the at least one non-semiconductor layer comprising oxygen.

12. The semiconductor device of claim 11 wherein the at least one localized region comprises a plurality thereof.

13. The semiconductor device of claim 11 wherein the dopant has a fall-off steeper than 3.0 nm/decade.

14. The semiconductor device of claim 11 wherein the plurality of stacked groups of layers comprises laterally-spaced apart stacked groups of layers on the semiconductor substrate; and wherein the dopant is localized in respective localized regions beneath each of the laterally-spaced apart stacked groups of layers.

15. The semiconductor device of claim 11 wherein the dopant comprises at least one of boron and arsenic.

16. The semiconductor device of claim 11 wherein at least some semiconductor atoms from opposing base semiconductor portions are chemically bound together through the at least one non-semiconductor monolayer therebetween.

17. A semiconductor device comprising:
a semiconductor substrate;
a plurality of stacked groups of layers on the semiconductor substrate, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; and
a dopant in the semiconductor substrate beneath the plurality of stacked groups of layers in at least one localized region with the plurality of stacked groups of layers vertically and horizontally constraining the dopant in the at least one localized region, the dopant having a fall-off steeper than 3.0 nm/decade;
the plurality of stacked groups of layers comprising laterally-spaced apart stacked groups of layers on the semiconductor substrate, and the dopant being localized in respective localized regions being coextensively aligned beneath each of the laterally-spaced apart stacked groups of layers.

18. The semiconductor device of claim 17 wherein the dopant comprises at least one of boron and arsenic.

19. The semiconductor device of claim 17 wherein each base semiconductor portion comprises silicon.

20. The semiconductor device of claim 17 wherein the at least one non-semiconductor layer comprises oxygen.

21. The semiconductor device of claim 17 wherein at least some semiconductor atoms from opposing base semiconductor portions are chemically bound together through the at least one non-semiconductor monolayer therebetween.

Assignees

• Atomera Inc

Inventors

• Mears Robert J

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P30/212

  Through-implantation · CPC title

• H10P30/204 Primary

  into Group IV semiconductors · CPC title

• H10P30/21

  of electrically active species · CPC title

• H10P14/3252

  Alternating layers, e.g. superlattice · CPC title