Control of warpage using ABF GC cavity for embedded die package
US-12009318-B2 · Jun 11, 2024 · US
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Sobieski Daniel N patents
Sobieski Daniel N is listed as an inventor on 27 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Sobieski Daniel N |
| Total patents | 27 |
| First publication | Jan 5, 2016 |
| Latest publication | Jun 11, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Control of warpage using abf gc cavity for embedded die package
US-2022230972-A1 · Jul 21, 2022 · US
Control of warpage using ABF GC cavity for embedded die package
US-11322457-B2 · May 3, 2022 · US
Control of warpage using abf gc cavity for embedded die package
US-2020251426-A1 · Aug 6, 2020 · US
Control of warpage using ABF GC cavity for embedded die package
US-10658307-B2 · May 19, 2020 · US
Method of fabricating a microelectronic substrate
US-10494700-B2 · Dec 3, 2019 · US
Method of forming an interference shield on a substrate
US-10375832-B2 · Aug 6, 2019 · US
Control of warpage using abf gc cavity for embedded die package
US-2018301423-A1 · Oct 18, 2018 · US
Flexible microelectronic systems and methods of fabricating the same
US-10103037-B2 · Oct 16, 2018 · US
Formation of dielectric with smooth surface
US-10070537-B2 · Sep 4, 2018 · US
Recent patents
Latest publications not already listed above.
Control of warpage using ABF GC cavity for embedded die package
US-9941219-B2 · Apr 10, 2018 · US
Integration of embedded thin film capacitors in package substrates
US-9941054-B2 · Apr 10, 2018 · US
Hybrid pitch package with ultra high density interconnect capability
US-9899311-B2 · Feb 20, 2018 · US
Microelectronic substrates having copper alloy conductive route structures
US-2017362684-A1 · Dec 21, 2017 · US
Microelectronic substrates having copper alloy conductive route structures
US-9758845-B2 · Sep 12, 2017 · US
Hybrid pitch package with ultra high density interconnect capability
US-9633938-B2 · Apr 25, 2017 · US
Hybrid pitch package with ultra high density interconnect capability
US-2017092575-A1 · Mar 30, 2017 · US
Hybrid pitch package with ultra high density interconnect capability
US-2017092573-A1 · Mar 30, 2017 · US
Bumpless build-up layer (BBUL) semiconductor package with ultra-thin dielectric layer
US-9520350-B2 · Dec 13, 2016 · US
Device, system and method for providing MEMS structures of a semiconductor package
US-9505610-B2 · Nov 29, 2016 · US
Integration of embedded thin film capacitors in package substrates
US-2016329153-A1 · Nov 10, 2016 · US
Integration of embedded thin film capacitors in package substrates
US-9420693-B2 · Aug 16, 2016 · US
Formation of dielectric with smooth surface
US-2016192508-A1 · Jun 30, 2016 · US
Microelectronic substrates having copper alloy conductive route structures
US-2016183361-A1 · Jun 23, 2016 · US
Thin film based electromagnetic interference shielding with bbul/coreless packages
US-2016088738-A1 · Mar 24, 2016 · US
Control of warpage using abf gc cavity for embedded die package
US-2016086894-A1 · Mar 24, 2016 · US
Thin film based electromagnetic interference shielding with BBUL/coreless packages
US-9232686-B2 · Jan 5, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 27 |
| Sobieski Daniel N | 3 |
| Teh Weng Hong | 2 |
| Ibrahim Tarek A | 1 |
| Haney Sarah K | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W70/685 | 19 |
| H10W90/724 | 16 |
| H01L23/49822 | 15 |
| H10W90/701 | 15 |
| H10W70/60 | 13 |