Formation of dielectric with smooth surface

Patent metadata

Field	Value
Publication number	US-10070537-B2
Application number	US-201615065620-A
Country	US
Kind code	B2
Filing date	Mar 9, 2016
Priority date	May 30, 2013
Publication date	Sep 4, 2018
Grant date	Sep 4, 2018

Abstract

Embodiments of the present disclosure are directed towards techniques and configurations for formation of a dielectric with a smooth surface. In one embodiment, a method includes providing a dielectric with first and second surfaces, a conductive feature formed on the first surface, and a laminate applied to the second surface, curing the second surface while the laminate remains applied, and removing the laminate. Other embodiments may be described and/or claimed.

First claim

What is claimed is:

1. A method, comprising:
providing a dielectric with first and second surfaces, a conductive feature formed on the first surface, and a laminate applied to the second surface;
curing the second surface while the laminate remains applied, wherein the second surface of dielectric forms a negative imprint of a surface of the laminate that contacts the dielectric in response to the curing, wherein the surface of the laminate applied to the second surface of the dielectric is smooth, and wherein the second surface of the dielectric has a surface roughness of less than 75 nanometers in response to a first time of the curing; and
removing the laminate.

2. The method of claim 1 , further comprising depositing a metal layer onto the second surface using a physical vapor deposition (PVD) process.

3. The method of claim 2 , wherein:
the PVD process includes sputtering or evaporation; and
the metal layer comprises a seed layer.

4. The method of claim 1 , further comprising:
forming a via from the second surface through the dielectric to the conductive feature; and
chemically desmearing the via.

5. The method of claim 4 , wherein the forming the via and desmearing the via are performed while the laminate remains applied to the second surface.

6. The method of claim 4 , further comprising applying a surface masking layer to the second surface after the laminate is removed.

7. The method of claim 6 , wherein forming the via and desmearing the via are performed while the surface masking layer remains applied to the second surface.

8. The method of claim 1 , further comprising curing the second surface again after the laminate is removed.

9. The method of claim 1 , wherein the conductive feature is a first conductive feature, the method further comprising forming a second conductive feature by depositing an electrically conductive material to fill the via, the second conductive feature being electrically coupled with the first conductive feature.

10. The method of claim 9 , wherein the second conductive feature is formed using an additive process.

11. The method of claim 9 , wherein the second conductive feature is formed using a subtractive process.

12. A method for surface formation of a dielectric, comprising:
applying a laminate to a surface of the dielectric;
curing, a first time, the surface of the dielectric with the applied laminate, wherein the surface of dielectric forms a negative imprint of a surface of the laminate that contacts the dielectric in response to the curing, wherein the surface of the laminate applied to the surface of the dielectric is smooth, and wherein the surface of the dielectric has a surface roughness of less than 75 nanometers in response to the first time of the curing;
removing the laminate from the surface of the dielectric after completion of the first time of curing; and
curing, a subsequent time, the surface of the dielectric without the laminate applied to the surface.

13. The method of claim 12 , wherein removing the laminate includes utilization of an adhesive tape to remove the laminate.

14. The method of claim 12 , wherein curing, the first time, includes adjusting a cure time to achieve a desired smoothness of the surface of the dielectric.

15. The method of claim 12 , wherein the method further comprises electrically coupling the dielectric to a die.

16. The method of claim 12 , wherein the method further comprises electrically coupling the dielectric to a circuit board.

17. The method of claim 12 , wherein curing, the first time, includes application of heat to the surface of the dielectric.

18. A method for surface formation of a dielectric, comprising:
applying a laminate to a surface of the dielectric;
curing, a first time, the surface of the dielectric with the applied laminate, wherein the surface of dielectric forms a negative imprint of a surface of the laminate that contacts the dielectric in response to the curing, wherein curing, the first time, includes adjusting a heating ramp rate to achieve a desired smoothness of the surface of the dielectric;
removing the laminate from the surface of the dielectric after completion of the first time of curing; and
curing, a subsequent time, the surface of the dielectric without the laminate applied to the surface.

19. The method of claim 18 , wherein the surface of the laminate applied to the surface of the dielectric is smooth, and wherein the surface of the dielectric has a surface roughness of less than 75 nanometers in response to the first time of the curing.

20. The method of claim 18 , wherein curing, the first time, includes adjusting a cure time to achieve a desired smoothness of the surface of the dielectric.

Assignees

• Intel Corp

Inventors

• Arora Deepak
• Sobieski Daniel N
• Seneviratne Dilan
• Andideh Ebrahim
• Meyer James C

Classifications

• H10D64/011

  of electrodes ohmically coupled to a semiconductor · CPC title

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/016

  using moulds · CPC title