Method of manufacturing a semiconductor device including an ohmic contact and a gate dielectric
US-2025357122-A1 · Nov 20, 2025 · US
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Schaeffer Carsten patents
Schaeffer Carsten is listed as an inventor on 43 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Schaeffer Carsten |
| Total patents | 43 |
| First publication | Feb 26, 2015 |
| Latest publication | Nov 20, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Semiconductor device
US-2025331246-A1 · Oct 23, 2025 · US
Semiconductor device
US-12363961-B2 · Jul 15, 2025 · US
Silicon carbide device
US-2025006814-A1 · Jan 2, 2025 · US
Semiconductor device including bonding pad metal layer structure
US-12183696-B2 · Dec 31, 2024 · US
Vertical power semiconductor device comprising source or emitter pad
US-2024347456-A1 · Oct 17, 2024 · US
Semiconductor device protection using an anti-reflective layer
US-12046509-B2 · Jul 23, 2024 · US
Semiconductor device and method of producing thereof
US-2024113216-A1 · Apr 4, 2024 · US
Semiconductor Device Including Bonding Pad Metal Layer Structure
US-2023395539-A1 · Dec 7, 2023 · US
High Voltage Semiconductor Device with Step Topography Passivation Layer Stack
US-2023343726-A1 · Oct 26, 2023 · US
Recent patents
Latest publications not already listed above.
Semiconductor device including bonding pad metal layer structure
US-11764176-B2 · Sep 19, 2023 · US
Chip arrangement, chip package, method of forming a chip arrangement, and method of forming a chip package
US-2023274996-A1 · Aug 31, 2023 · US
Semiconductor device
US-2023154978-A1 · May 18, 2023 · US
Semiconductor device protection
US-2022199464-A1 · Jun 23, 2022 · US
Semiconductor Device Including Bonding Pad Metal Layer Structure
US-2022059477-A1 · Feb 24, 2022 · US
Semiconductor device and a method of forming the semiconductor device
US-11171049-B2 · Nov 9, 2021 · US
Semiconductor device and method of manufacturing a semiconductor device
US-11139375-B2 · Oct 5, 2021 · US
High Voltage Semiconductor Device with Step Topography Passivation Layer Stack
US-2021151391-A1 · May 20, 2021 · US
Silicon carbide semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor device
US-10777506-B2 · Sep 15, 2020 · US
Silicon Carbide Semiconductor Device Having a Metal Adhesion and Barrier Structure and a Method of Forming Such a Semiconductor Device
US-2020013722-A1 · Jan 9, 2020 · US
Semiconductor device and method of manufacturing a semiconductor device
US-2020013859-A1 · Jan 9, 2020 · US
Semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor device
US-10475743-B2 · Nov 12, 2019 · US
Buried insulator regions and methods of formation thereof
US-10410911-B2 · Sep 10, 2019 · US
Semiconductor device and a method of forming the semiconductor device
US-2019267283-A1 · Aug 29, 2019 · US
Self-organizing barrier layer disposed between a metallization layer and a semiconductor region
US-10332793-B2 · Jun 25, 2019 · US
Forming a contact layer on a semiconductor body
US-10002930-B2 · Jun 19, 2018 · US
Buried Insulator Regions and Methods of Formation Thereof
US-2018166324-A1 · Jun 14, 2018 · US
Semiconductor device with a reduced band gap zone
US-9859272-B2 · Jan 2, 2018 · US
Semiconductor device with a passivation layer
US-9859395-B2 · Jan 2, 2018 · US
Semiconductor Device Having a Metal Adhesion and Barrier Structure and a Method of Forming Such a Semiconductor Device
US-2017271268-A1 · Sep 21, 2017 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Infineon Technologies Ag | 40 |
| Infineon Technologies Austria Ag | 4 |
| Werber Dorothea | 1 |
| Pfirsch Frank | 1 |
| Schulze Hans-Joachim | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10D12/481 | 15 |
| H10D62/106 | 15 |
| H01L29/7397 | 12 |
| H10D62/8325 | 11 |
| H10D62/105 | 11 |