Semiconductor device

Patent metadata

Field	Value
Publication number	US-2023154978-A1
Application number	US-202117526490-A
Country	US
Kind code	A1
Filing date	Nov 15, 2021
Priority date	Nov 15, 2021
Publication date	May 18, 2023
Grant date	—

Abstract

A semiconductor device and a method of forming a semiconductor device are provided. In an embodiment, the semiconductor device comprises a device region, an edge termination region surrounding the device region, a first metal feature in the edge termination region, a first conformal ion diffusion barrier layer over the first metal feature, and a first conformal chemical protection layer over the first conformal ion diffusion barrier layer.

First claim

What is claimed is:

1 . A semiconductor device, comprising:
a device region; an edge termination region surrounding the device region; a first metal feature in the edge termination region; a first conformal ion diffusion barrier layer over the first metal feature; and a first conformal chemical protection layer over the first conformal ion diffusion barrier layer.

2 . The semiconductor device of claim 1 , comprising:
a dielectric layer over the first conformal chemical protection layer.

3 . The semiconductor device of claim 2 , comprising:
a polymer layer over the dielectric layer.

4 . The semiconductor device of claim 3 , wherein:
the polymer layer comprises at least one of polyimide, benzocyclobutene, polybenzoxazole, or an inorganic-organic hybrid material.

5 . The semiconductor device of claim 2 , wherein:
the dielectric layer comprises silicon nitride.

6 . The semiconductor device of claim 1 , wherein:
the first metal feature comprises a metal ring surrounding the device region.

7 . The semiconductor device of claim 1 , wherein:
the first metal feature comprises a field plate.

8 . The semiconductor device of claim 1 , comprising:
a second conformal ion diffusion barrier layer over the first conformal chemical protection layer; and a second conformal chemical protection layer over the second conformal ion diffusion barrier layer.

9 . The semiconductor device of claim 1 , comprising:
a conformal charge shielding layer under the first conformal ion diffusion barrier layer and over the first metal feature.

10 . A semiconductor device, comprising:
a device region; an edge termination region adjacent the device region; a first metal feature in the edge termination region; a first atomic layer deposition layer having a first material composition over the first metal feature; and a second atomic layer deposition layer having a second material composition different than the first material composition over the first atomic layer deposition layer.

11 . The semiconductor device of claim 10 , comprising:
a dielectric layer over the second atomic layer deposition layer.

12 . The semiconductor device of claim 11 , comprising:
a polymer layer over the dielectric layer.

13 . The semiconductor device of claim 12 , wherein:
the polymer layer comprises at least one of a polyimide, benzocyclobutene, polybenzoxazole, or an inorganic-organic hybrid material.

14 . The semiconductor device of claim 11 , wherein:
the dielectric layer comprises silicon nitride.

15 . The semiconductor device of claim 10 , wherein:
the first metal feature comprises a metal ring surrounding the device region.

16 . The semiconductor device of claim 10 , comprising:
a third atomic layer deposition layer having the first material composition over the second atomic layer deposition layer; and a fourth atomic layer deposition layer having the second material composition over the third atomic layer deposition layer.

17 . The semiconductor device of claim 10 , comprising:
a conformal charge shielding layer under the first atomic layer deposition layer and over the first metal feature.

18 . A method for forming a semiconductor device, comprising:
forming a first conformal layer having a first material composition and a first thickness less than 200 nm over a first metal feature formed in an edge termination region of the semiconductor device; forming a second conformal layer having a second material composition different than the first material composition and a second thickness less than 200 nm over the first conformal layer; and forming a conformal dielectric layer over the second conformal layer.

19 . The method of claim 18 , comprising:
forming a polymer layer over the conformal dielectric layer.

20 . The method of claim 19 , wherein forming the polymer layer comprises:
forming at least one of a polyimide layer, a benzocyclobutene layer, a polybenzoxazole layer, or an inorganic-organic hybrid material layer.

21 . The method of claim 18 , wherein forming the conformal dielectric layer comprises:
forming a silicon nitride layer.

22 . The method of claim 18 , wherein:
the first metal feature comprises a metal ring surrounding a device region of the semiconductor device.

23 . The method of claim 18 , comprising:
forming a third conformal layer having the first material composition over the second conformal layer; and forming a fourth conformal layer having the second material composition over the third conformal layer.

24 . The method of claim 18 , comprising:
forming a conformal charge shielding layer under the first conformal layer and over the first metal feature.

25 . The method of claim 18 , wherein forming the first conformal layer comprises:
performing an atomic layer deposition process to form the first conformal layer.

26 . The method of claim 18 , wherein forming the first conformal layer comprises:
performing a pulsed chemical vapor deposition process to form the first conformal layer.

Assignees

• Infineon Technologies Ag

Inventors

• Schaeffer Carsten
• Hanekamp Patrick
• Humbel Oliver
• Koprowski Angelika
• Lehnert Wolfgang
• Santos Rodriguez Francisco Javier

Classifications

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/6339

  deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

• H10P14/683

  carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC · CPC title

• H10W74/147

  the encapsulations being multilayered · CPC title

• H10W74/137

  the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title