Semiconductor device and a method of forming the semiconductor device

Patent metadata

Field	Value
Publication number	US-11171049-B2
Application number	US-201916404745-A
Country	US
Kind code	B2
Filing date	May 7, 2019
Priority date	Nov 30, 2015
Publication date	Nov 9, 2021
Grant date	Nov 9, 2021

Abstract

According to various embodiments, a device may include: a semiconductor region; a metallization layer disposed over the semiconductor region; and a self-organizing barrier layer disposed between the metallization layer and the semiconductor region, wherein the self-organizing barrier layer comprises a first metal configured to be self-segregating from the metallization layer.

First claim

What is claimed is:

1. A method, comprising:
forming a metallization layer over a semiconductor region, wherein the metallization layer comprises a self-segregating composition comprising an alloying element and a host material; and
forming a self-organizing barrier layer between the host material and the semiconductor region, wherein forming the self-organizing barrier layer comprises activating a segregation of the alloying element from the self-segregating composition
forming a further barrier layer between the metallization layer and the semiconductor region, the further barrier layer comprising at least one defect including an opening extending through the further barrier,
wherein forming the self-organizing barrier layer comprises sealing the at least one defect in the further barrier layer with the self-organizing barrier layer.

2. The method of claim 1 ,
wherein activating the segregation of the alloying element from the metallization layer comprises heating the metallization layer.

3. The method of claim 2 ,
wherein heating the metallization layer comprises heating the metallization layer to a temperature greater than a segregation temperature needed to activate the segregation of the alloying element from the metallization layer.

4. The method of claim 1 ,
wherein activating the segregation of the alloying element from the metallization layer comprises activating a migration of the alloying element from the metallization layer towards the semiconductor region.

5. The method of claim 1 ,
wherein activating the segregation of the alloying element from the metallization layer comprises reducing a concentration of the alloying element in the metallization layer.

6. The method of claim 5 ,
wherein the concentration of the alloying element in the metallization layer before activating the segregation is greater than the concentration of the alloying element in the metallization layer after activating the segregation.

7. The method of claim 5 , wherein the concentration of the alloying element in the metallization layer before or after activating the segregation is less than a concentration of the alloying element in the self-organizing barrier layer.

8. The method of claim 1 ,
wherein a concentration of the alloying element in the metallization layer is less than a concentration of the host material in the metallization layer.

9. The method of claim 1 ,
wherein a concentration of the alloying element in the metallization layer is substantially homogenous in the metallization layer.

10. The method of claim 1 ,
wherein the metallization layer is in physical contact with the semiconductor region.

11. The method of claim 1 ,
wherein the self-organizing barrier layer comprises a barrier compound including the alloying element and semiconductor material of the semiconductor region.

12. The method of claim 11 ,
wherein a concentration of the barrier compound in the self-organizing layer barrier layer is greater than 70 at %.

13. The method of claim 11 ,
wherein a concentration of the barrier compound in the self-organizing layer barrier layer is greater than 99 at %.

14. The method of claim 1 ,
wherein the alloying element includes at least one of manganese, tantalum, chromium, tungsten, and/or molybdenum.

15. The method of claim 1 ,
wherein a thickness of the metallization layer before activating the segregation is greater than a thickness of the metallization layer after activating the segregation.

16. The method of claim 1 ,
wherein a thickness of the metallization layer before or after activating the segregation is greater than one hundred times a thickness of the self-organizing barrier layer.

17. The method of claim 1 ,
wherein the self-organizing barrier layer physically separates the metallization layer from the semiconductor region.

18. The method of claim 1 ,
wherein the alloying element is configured to segregate from the metallization layer faster than the metallization layer chemically reacts with semiconductor material of the semiconductor region.

19. A method, comprising:
forming a metallization layer over a barrier layer;
wherein the metallization layer comprises an alloying element configured to be self-segregating from the metallization layer;
healing a defect in the barrier layer by segregating the alloying element from the metallization layer to at least one of in or over the defect.

Assignees

• Infineon Technologies Austria Ag
• Infineon Technologies Ag

Inventors

• Robl Werner
• Fugger Michael
• Schaeffer Carsten
• Nelhiebel Michael
• Pruegl Klemens

Classifications

• H10D64/0112

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• H10W20/4424

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• H10W20/0526

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• H10W20/425

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• H10W20/064

  by modifying the conductivity of conductive parts, e.g. by alloying · CPC title