Forming a contact layer on a semiconductor body

US10002930B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10002930-B2
Application numberUS-201615365627-A
CountryUS
Kind codeB2
Filing dateNov 30, 2016
Priority dateDec 1, 2015
Publication dateJun 19, 2018
Grant dateJun 19, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed is a method. The method includes forming a metal layer on a first surface of a semiconductor body; irradiating the metal layer with particles to move metal atoms from the metal layer into the semiconductor body and form a metal atom containing region in the semiconductor body; and annealing the semiconductor body. The annealing includes heating at least the metal atom containing region to a temperature of less than 500° C.

First claim

Opening claim text (preview).

What is claimed is: 1. A method, comprising: forming a metal layer on a first surface of a semiconductor body, the semiconductor body comprising a wide-bandgap semiconductor material having a bandgap of more than 2 eV; irradiating the metal layer with particles to move metal atoms from the metal layer into the semiconductor body and form a metal atom containing region in the semiconductor body; and annealing semiconductor body at an annealing temperature of less than 500° C., to form a silicide layer from the metal atoms moved into the metal atom containing region in the semiconductor body and from silicon atoms in the semiconductor body, and to form carbon precipitates in the silicide layer from carbon atoms in the semiconductor body. 2. The method of claim 1 , wherein the annealing temperature is higher than 350° C. 3. The method of claim 1 , wherein a duration of the annealing is in a range between 30 seconds and 30 minutes. 4. The method of claim 1 , wherein the semiconductor body comprises a doped region in a region adjoining the first surface. 5. The method of claim 4 , wherein a doping concentration of the doped region is in a range between 2E17 cm −3 and 2E20 cm −3 . 6. The method of claim 1 , wherein the particles comprise noble gas ions. 7. The method of claim 1 , wherein the particles comprise one of semiconductor and metal ions. 8. The method of claim 1 , wherein the particles comprise dopant ions. 9. The method of claim 8 , wherein the semiconductor body comprises SiC and the dopant ions are selected from the group consisting of: aluminum ions; and nitrogen atoms. 10. The method of claim 1 , wherein irradiating the metal layer comprises irradiating the metal layer with different types of particles. 11. The method of claim 1 , further comprising: removing the metal layer after the annealing. 12. The method of claim 11 , further comprising: forming a further metal layer on the first surface. 13. The method of claim 12 , wherein the further metal layer comprises a Schottky metal. 14. The method of claim 13 , wherein the Schottky metal is configured to form a Schottky contact with a barrier height of between 0.7 eV and 1.6 eV on n-type SiC. 15. The method of claim 13 , wherein the Schottky metal is selected from the group consisting of: titanium (Ti); molybdenum (Mo); nickel (Ni); tantalum (Ta); molybdenum nitride (MoN); and titanium nitride (TiN). 16. The method of claim 1 , wherein irradiating the metal layer with particles comprises using a mask that comprises an opening and partially covers the metal layer. 17. The method of claim 4 , wherein the doped region is one of a source region and a drain region of a transistor device, or an emitter region of a bipolar diode or a merged bipolar Schottky diode. 18. The method of claim 1 , further comprising: implanting carbon atoms into the semiconductor body during the irradiating of the metal layer, to promote formation of the carbon precipitates during the annealing of the semiconductor body. 19. The method of claim 4 , further comprising: implanting dopant ions into the semiconductor body during the irradiating of the metal layer; and electrically activating the dopant ions during the annealing of the semiconductor body, to increase the doping concentration of the doped region in a region adjoining the silicide layer. 20. The method of claim 16 , further comprising: after the annealing of the semiconductor body, removing the metal layer only in those sections where the metal layer does not cover the silicide layer. 21. The method of claim 16 , further comprising: before the annealing of the semiconductor body, removing sections of the metal layer that do not cover the metal atom containing region in the semiconductor body. 22. A method, comprising: forming a metal layer on a first surface of a semiconductor body, the metal layer being formed to include n-type or p-type dopant atoms; irradiating the metal layer with particles to move metal atoms from the metal layer into the semiconductor body and form a metal atom containing region in the semiconductor body, and to move at least some of the n-type or p-type dopant atoms from the metal layer into the semiconductor body; and annealing the semiconductor body, wherein the annealing comprises heating at least the metal atom containing region to temperature of less than 500° C., wherein forming the metal layer to include the n-type or p-type dopant atoms comprises depositing the metal layer in an atmosphere that includes the n-type or p-type dopant atoms.

Assignees

Inventors

Classifications

  • into crystalline silicon carbide · CPC title

  • of electrically active species · CPC title

  • to Group III-V semiconductors · CPC title

  • being Group III-V material · CPC title

  • within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase · CPC title

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What does patent US10002930B2 cover?
Disclosed is a method. The method includes forming a metal layer on a first surface of a semiconductor body; irradiating the metal layer with particles to move metal atoms from the metal layer into the semiconductor body and form a metal atom containing region in the semiconductor body; and annealing the semiconductor body. The annealing includes heating at least the metal atom containing regio…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H01L29/401. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 19 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).