Data path protection with parity information
US-2026023846-A1 · Jan 22, 2026 · US
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Richter Michael Dieter patents
Richter Michael Dieter is listed as an inventor on 125 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Richter Michael Dieter |
| Total patents | 125 |
| First publication | Feb 27, 2020 |
| Latest publication | Jan 22, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Multiple fuse comparison for early failure check
US-2026024604-A1 · Jan 22, 2026 · US
Redundancy techniques for multi-channel memory devices
US-2025308620-A1 · Oct 2, 2025 · US
Channel modulation for a memory device
US-2025265144-A1 · Aug 21, 2025 · US
Dynamic control of error management and signaling
US-2025258737-A1 · Aug 14, 2025 · US
Configuring command/address channel for memory
US-12333165-B2 · Jun 17, 2025 · US
Reconfigurable channel interfaces for memory devices
US-2025181537-A1 · Jun 5, 2025 · US
Channel modulation for a memory device
US-12314128-B2 · May 27, 2025 · US
Dynamic control of error management and signaling
US-12298849-B2 · May 13, 2025 · US
Indicating data corruption
US-2025117273-A1 · Apr 10, 2025 · US
Recent patents
Latest publications not already listed above.
Reconfigurable channel interfaces for memory devices
US-12242408-B2 · Mar 4, 2025 · US
Drive strength calibration for multi-level signaling
US-2025046347-A1 · Feb 6, 2025 · US
Controlled heating of a memory device
US-12210774-B2 · Jan 28, 2025 · US
Bit inversion techniques for memory system repair indications
US-2025029673-A1 · Jan 23, 2025 · US
Maintaining integrity of configuration data for memory systems
US-2025028598-A1 · Jan 23, 2025 · US
Metadata transfer using unassigned codes of an encoder
US-2025021430-A1 · Jan 16, 2025 · US
Bit and signal level mapping
US-2025013527-A1 · Jan 9, 2025 · US
Transmission failure feedback schemes for reducing crosstalk
US-2025013530-A1 · Jan 9, 2025 · US
Techniques for data path address protection
US-2025013534-A1 · Jan 9, 2025 · US
Learned temperature compensation
US-2025013525-A1 · Jan 9, 2025 · US
Temperature-based memory management
US-2024402935-A1 · Dec 5, 2024 · US
Offset cancellation
US-2024395299-A1 · Nov 28, 2024 · US
Drive strength calibration for multi-level signaling
US-12148502-B2 · Nov 19, 2024 · US
Data inversion techniques
US-2024372644-A1 · Nov 7, 2024 · US
Transmission failure feedback schemes for reducing crosstalk
US-12124329-B2 · Oct 22, 2024 · US
Bit and signal level mapping
US-12099406-B2 · Sep 24, 2024 · US
Adapting channel current
US-12081331-B2 · Sep 3, 2024 · US
Offset cancellation
US-12027231-B2 · Jul 2, 2024 · US
Temperature-based memory management
US-12019900-B2 · Jun 25, 2024 · US
Data inversion techniques
US-12015476-B2 · Jun 18, 2024 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Micron Technology Inc | 111 |
| Lodestar Licensing Group Llc | 14 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F11/1004 | 47 |
| G11C11/221 | 45 |
| G11C11/2273 | 34 |
| G06F3/0619 | 26 |
| G06F3/0659 | 26 |