Drive strength calibration for multi-level signaling

Patent metadata

Field	Value
Publication number	US-12148502-B2
Application number	US-202318202584-A
Country	US
Kind code	B2
Filing date	May 26, 2023
Priority date	Aug 21, 2018
Publication date	Nov 19, 2024
Grant date	Nov 19, 2024

Abstract

Methods, systems, and devices for drive strength calibration for multi-level signaling are described. A driver may be configured to have an initial drive strength and to drive an output pin of a transmitting device toward an intermediate voltage level of a multi-level modulation scheme, where the output pin is coupled with a receiving device via a channel. The receiving device may generate, and the transmitting device may receive, a feedback signal indicating a relationship between the resulting voltage of the channel and an value for the intermediate voltage level. The transmitting device may determine and configure the driver to use an adjusted drive strength for the intermediate voltage level based on the feedback signal. The driver may be calibrated (e.g., independently) for each intermediate voltage level of the multi-level modulation scheme. Further, the driver may be calibrated for the associated channel.

First claim

What is claimed is:

1. A method, comprising:
determining, by a memory device based at least in part on performing a first type of calibration procedure that uses a calibration resistor, a first drive strength for a driver that communicates over a data line according to a modulation scheme that includes at least a first voltage level and a second voltage level higher than the first voltage level;
increasing, based at least in part on determining the first drive strength for the driver using the first type of calibration procedure and as part of performing a second type of calibration procedure for the second voltage level that involves feedback from a host device, a drive strength of the driver from an initial level until the host device coupled with the driver indicates, via the feedback, that a voltage output by the driver is greater than a target voltage level; and
determining, for the driver, a second drive strength for the second voltage level based at least in part on the host device indicating that the voltage output by the driver is greater than the target voltage level.

2. The method of claim 1 , wherein the feedback comprises an output signal, the method further comprising:
monitoring the output signal from the host device concurrent with increasing the drive strength of the driver.

3. The method of claim 2 , further comprising:
detecting, based at least in part on monitoring the output signal, a change in the output signal that indicates that the voltage output by the driver is greater than the target voltage level.

4. The method of claim 1 , further comprising:
setting the drive strength of the driver to the initial level based at least in part on determining to perform the second type of calibration procedure for the second voltage level.

5. The method of claim 1 , wherein the first drive strength comprises a first impedance and the second drive strength comprises a second impedance.

6. The method of claim 1 , wherein the modulation scheme comprises a pulse amplitude modulation scheme, and wherein the second voltage level represents one or more data bits.

7. A memory device, comprising:
a driver configured to communicate over a data line according to a modulation scheme that includes at least a first voltage level and a second voltage level higher than the first voltage level, wherein the memory device is configured to:
determine, based at least in part on performing a first type of calibration procedure that uses a calibration resistor, a first drive strength for the driver;
increase, based at least in part on determining the first drive strength using the first type of calibration procedure and as part of performing a second type of calibration procedure for the second voltage level that involves feedback from a host device, a drive strength of the driver from an initial level until the host device indicates that a voltage output by the driver is greater than a target voltage level; and
determine, for the driver, a second drive strength for the second voltage level based at least in part on the host device indicating that the voltage output by the driver is greater than the target voltage level.

8. The memory device of claim 7 , wherein the modulation scheme comprises a pulse amplitude modulation scheme, and wherein the second voltage level represents one or more data bits.

9. The memory device of claim 7 , wherein the feedback comprises an output signal, and wherein the memory device is further configured to:
monitor the output signal from the host device concurrent with increasing the drive strength of the driver; and
detect, based at least in part on monitoring the output signal, a change in the output signal that indicates that the voltage output by the driver is greater than the target voltage level.

10. The memory device of claim 7 , wherein the memory device is further configured to:
set the drive strength of the driver to the initial level based at least in part on determining to perform the second type of calibration procedure for the second voltage level.

11. A method, comprising:
determining, by a memory device based at least in part on performing a first type of calibration procedure that uses a calibration resistor, a first drive strength for a driver that communicates over a data line according to a pulse amplitude modulation scheme that includes at least a lowest voltage level, a highest voltage level, and an intermediate voltage level between the lowest voltage level and the highest voltage level;
increasing, based at least in part on determining the first drive strength for the driver using the first type of calibration procedure and as part of a second type of calibration procedure for the intermediate voltage level that involves feedback from a host device, a drive strength of the driver from an initial level until host device coupled with the driver indicates, via the feedback, that a voltage output by the driver is greater than a target voltage level; and
determining, for the driver, a second drive strength for the intermediate voltage level based at least in part on the host device indicating that the voltage output by the driver is greater than the target voltage level.

12. The method of claim 11 , wherein the first drive strength corresponds to the lowest voltage level for the pulse amplitude modulation scheme.

13. The method of claim 11 , wherein the pulse amplitude modulation scheme includes a second intermediate voltage level that is between the intermediate voltage level and the highest voltage level.

14. The method of claim 13 , further comprising:
selecting the intermediate voltage level for the calibration procedure based at least in part on the intermediate voltage level being closer to the lowest voltage level than the second intermediate voltage level.

15. The method of claim 13 , further comprising:
determining to perform a second calibration procedure of the second type for the second intermediate voltage level based at least in part on determining the second drive strength for the intermediate voltage level.

16. The method of claim 11 , wherein the target voltage level selected based at least in part on the lowest voltage level and the highest voltage level.

17. The method of claim 11 , further comprising:
determining a third drive strength for the highest voltage level based at least in part on the calibration resistor.

Assignees

• Micron Technology Inc

Inventors

• Mayer Peter
• Spirkl Wolfgang Anton
• Richter Michael Dieter
• Brox Martin
• Hein Thomas

Classifications

• G11C11/5657 Primary

  using ferroelectric storage elements · CPC title

• G11C11/2273

  Reading or sensing circuits or methods · CPC title

• G11C11/221

  using ferroelectric capacitors · CPC title

• G11C7/1069

  I/O lines read out arrangements · CPC title

• G11C7/109

  Control signal input circuits · CPC title