Integrated circuit tester probe contact liner
US-11009545-B2 · May 18, 2021 · US
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Erwin Brian M patents
Erwin Brian M is listed as an inventor on 50 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Erwin Brian M |
| Total patents | 50 |
| First publication | Aug 20, 2015 |
| Latest publication | May 18, 2021 |
Notable patents
Publications ranked by popularity score, then publication date.
Carrier and integrated memory
US-10892249-B2 · Jan 12, 2021 · US
Carrier and integrated memory
US-10840214-B2 · Nov 17, 2020 · US
Finned contact
US-2020294946-A1 · Sep 17, 2020 · US
Finned contact
US-10756041-B1 · Aug 25, 2020 · US
Integrated circuit tester probe contact liner
US-2020209308-A1 · Jul 2, 2020 · US
Integrated circuit tester probe contact liner
US-10670653-B2 · Jun 2, 2020 · US
Element place on laminates
US-10566275-B2 · Feb 18, 2020 · US
Carrier and integrated memory
US-10515929-B2 · Dec 24, 2019 · US
Carrier and integrated memory
US-2019378816-A1 · Dec 12, 2019 · US
Recent patents
Latest publications not already listed above.
Integrated circuit tester probe contact liner
US-2019353702-A1 · Nov 21, 2019 · US
Carrier and integrated memory
US-2019312011-A1 · Oct 10, 2019 · US
Carrier and integrated memory
US-2019312010-A1 · Oct 10, 2019 · US
Carrier and integrated memory
US-2019312009-A1 · Oct 10, 2019 · US
Carrier and integrated memory
US-10431563-B1 · Oct 1, 2019 · US
Element place on laminates
US-2019148283-A1 · May 16, 2019 · US
Element place on laminates
US-10224269-B2 · Mar 5, 2019 · US
Security mesh and method of making
US-9961765-B2 · May 1, 2018 · US
Maskless selective retention of a cap upon a conductor from a nonconductive capping layer
US-2018082965-A1 · Mar 22, 2018 · US
Maskless selective retention of a cap upon a conductor from a nonconductive capping layer
US-2018076160-A1 · Mar 15, 2018 · US
Substrate including selectively formed barrier layer
US-9754823-B2 · Sep 5, 2017 · US
Substrate including selectively formed barrier layer
US-9748135-B2 · Aug 29, 2017 · US
Non-transparent microelectronic grade glass as a substrate, temporary carrier or wafer
US-9728440-B2 · Aug 8, 2017 · US
Protection of elements on a laminate surface
US-2017179042-A1 · Jun 22, 2017 · US
Element place on laminates
US-2017179015-A1 · Jun 22, 2017 · US
Security mesh and method of making
US-2017171964-A1 · Jun 15, 2017 · US
Laminate warpage control
US-9640492-B1 · May 2, 2017 · US
Maskless selective retention of a cap upon a conductor from a nonconductive capping layer
US-2017117241-A1 · Apr 27, 2017 · US
Under die surface mounted electrical elements
US-9601423-B1 · Mar 21, 2017 · US
Security mesh and method of making
US-9565777-B1 · Feb 7, 2017 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 47 |
| Suss Microtec Photonic Systems Inc | 10 |
| Globalfoundries Inc | 5 |
| Süss Microtec Photonic Systems Inc | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W72/252 | 33 |
| H10W72/29 | 22 |
| H10W72/952 | 19 |
| H10W72/019 | 19 |
| H10W72/923 | 17 |