Non-transparent microelectronic grade glass as a substrate, temporary carrier or wafer

Patent metadata

Field	Value
Publication number	US-9728440-B2
Application number	US-201414525267-A
Country	US
Kind code	B2
Filing date	Oct 28, 2014
Priority date	Oct 28, 2014
Publication date	Aug 8, 2017
Grant date	Aug 8, 2017

Abstract

A method for processing a semiconductor wafer where an opaque layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be detected through optical sensors. The opaque layer may be modified, or oriented, to allow light to pass through unobstructed.

First claim

What is claimed is:

1. A semiconductor structure comprising:
a support wafer, wherein the support wafer comprises a transparent wafer and an opaque surface on at least a portion of a surface of the transparent wafer;
a semiconductor wafer bonded to the support wafer.

2. The structure of claim 1 , wherein the opaque surface covers an entire surface of the support wafer.

3. The structure of claim 2 , wherein the opaque surface is frosted glass.

4. The structure of claim 1 , wherein the opaque surface covers only an outer edge of a surface of the support wafer.

5. The structure of claim 4 , wherein the opaque surface comprises at least a metal, a metal nitride or a metal oxide.

6. The structure of claim 4 , wherein the opaque surface covers only an outer annular edge of a the surface of the support wafer.

7. The structure of claim 6 , wherein the transparent wafer and opaque surface are separate layers in direct contact with each other.

8. The structure of claim 7 , further comprising a clarifying layer on the opaque surface.

9. The structure of claim 8 , wherein the clarifying layer includes a similar refractive index as the opaque surface.

Assignees

• IBM
• Globalfoundries Inc

Inventors

• Arvin Charles L
• Cox Harry D
• Erwin Brian M
• Lubguban Jorge A
• Perfecto Eric D
• Schuler Jennifer D

Classifications

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P72/7422

  used to protect an active side of a device or wafer · CPC title

• H10P72/7416

  used during dicing or grinding · CPC title

• H10P72/7412

  the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support · CPC title

• H10P72/744

  Details of chemical or physical process used for separating the auxiliary support from a device or a wafer · CPC title