Interconnection fabric for buried power distribution
US-2026096418-A1 · Apr 2, 2026 · US
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Dechene Daniel James patents
Dechene Daniel James is listed as an inventor on 34 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Dechene Daniel James |
| Total patents | 34 |
| First publication | Jan 21, 2021 |
| Latest publication | Apr 2, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Interconnect structure including vertically stacked power and ground lines
US-12575399-B2 · Mar 10, 2026 · US
Interconnection fabric for buried power distribution
US-12550711-B2 · Feb 10, 2026 · US
Metal lines with low via-to-via spacing
US-12400871-B2 · Aug 26, 2025 · US
Stacked transistor layout for improved cell height scaling
US-12363965-B2 · Jul 15, 2025 · US
Using a same mask for direct print and self-aligned double patterning of nanosheets
US-12080559-B2 · Sep 3, 2024 · US
Precise bottom junction formation for vertical transport field effect transistor with highly doped epitaxial source/drain, sharp junction gradient, and/or reduced parasitic capacitance
US-12068415-B2 · Aug 20, 2024 · US
Circuit design watermarking
US-11977614-B2 · May 7, 2024 · US
Stacked transistor layout for improved cell height scaling
US-2024055477-A1 · Feb 15, 2024 · US
Gate oxide for nanosheet transistor devices
US-11888048-B2 · Jan 30, 2024 · US
Recent patents
Latest publications not already listed above.
Back-side wafer modification
US-11830778-B2 · Nov 28, 2023 · US
Buried via-to-backside power rail (vbpr) for stacked field-effect transistor (fet)
US-2023369217-A1 · Nov 16, 2023 · US
Interconnect structure including vertically stacked power and ground lines
US-2023238323-A1 · Jul 27, 2023 · US
Circuit design watermarking
US-2023090521-A1 · Mar 23, 2023 · US
Precise bottom junction formation for vertical transport field effect transistor with highly doped epitaxial source/drain, sharp junction gradient, and/or reduced parasitic capacitance
US-2023029561-A1 · Feb 2, 2023 · US
Line cut patterning using sacrificial material
US-11527434-B2 · Dec 13, 2022 · US
Precise bottom junction formation for vertical transport field effect transistor with highly doped epitaxial source/drain, sharp junction gradient, and/or reduced parasitic capacitance
US-11515427-B2 · Nov 29, 2022 · US
Back-side wafer modification
US-2022148927-A1 · May 12, 2022 · US
Using a same mask for direct print and self-aligned double patterning of nanosheets
US-2022102153-A1 · Mar 31, 2022 · US
Gate oxide for nanosheet transistor devices
US-2022069104-A1 · Mar 3, 2022 · US
Using a same mask for direct print and self-aligned double patterning of nanosheets
US-11257681-B2 · Feb 22, 2022 · US
Gate oxide for nanosheet transistor devices
US-11211474-B2 · Dec 28, 2021 · US
Precise bottom junction formation for vertical transport field effect transistor with highly doped epitaxial source/drain, sharp junction gradient, and/or reduced parasitic capacitance
US-2021391473-A1 · Dec 16, 2021 · US
Patterning line cuts before line patterning using sacrificial fill material
US-11158536-B2 · Oct 26, 2021 · US
Inverted, self-aligned top-via structures
US-2021305152-A1 · Sep 30, 2021 · US
Interconnection fabric for buried power distribution
US-2021296234-A1 · Sep 23, 2021 · US
Self-aligned block via patterning for dual damascene double patterned metal lines
US-2021280457-A1 · Sep 9, 2021 · US
Line cut patterning using sacrificial material
US-2021265201-A1 · Aug 26, 2021 · US
Via-via spacing reduction without additional cut mask
US-2021265166-A1 · Aug 26, 2021 · US
Gate oxide for nanosheet transistor devices
US-2021217873-A1 · Jul 15, 2021 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 35 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10D84/038 | 16 |
| H10W20/089 | 11 |
| H10D30/6735 | 11 |
| H10P76/4085 | 11 |
| H01L21/0337 | 11 |