MOSFETs with multiple dislocation planes
US-9853157-B2 · Dec 26, 2017 · US
of silicon bodies
of silicon bodies · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10P95/402 |
| Official title | {of silicon bodies} |
| Display label | of silicon bodies |
| Total patents | 234 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is rapidly declining.
| Year | Patents |
|---|---|
| 2015 | 23 |
| 2016 | 35 |
| 2017 | 35 |
| 2018 | 20 |
| 2019 | 18 |
| 2020 | 27 |
| 2021 | 23 |
| 2022 | 11 |
| 2023 | 18 |
| 2024 | 13 |
| 2025 | 9 |
| 2026 | 2 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Peeling method and method of manufacturing semiconductor device
US-9755148-B2 · Sep 5, 2017 · US
Method to form dual channel semiconductor material fins
US-2016372473-A1 · Dec 22, 2016 · US
Gallium Nitride Apparatus with a Trap Rich Region
US-2016351666-A1 · Dec 1, 2016 · US
Semiconductor Device Having an Impurity Concentration and Method of Manufacturing Thereof
US-2016336409-A1 · Nov 17, 2016 · US
Method of Manufacturing Semiconductor Devices and Semiconductor Device Containing Oxygen-Related Thermal Donors
US-2016329401-A1 · Nov 10, 2016 · US
Silicon germanium alloy fins with reduced defects
US-2016322501-A1 · Nov 3, 2016 · US
Method for producing semiconductor device
US-9431270-B2 · Aug 30, 2016 · US
Peeling Method and Method of Manufacturing Semiconductor Device
US-2016248013-A1 · Aug 25, 2016 · US
Method for growing an epitaxial film on a phosphorous-doped silicon wafer
US-9425264-B2 · Aug 23, 2016 · US
Method of reducing an impurity concentration in a semiconductor body, method of manufacturing a semiconductor device and semiconductor device
US-9425063-B2 · Aug 23, 2016 · US
Gate and gate forming process
US-2016233092-A1 · Aug 11, 2016 · US
Method of outgassing a mask material deposited over a workpiece in a process tool
US-9412619-B2 · Aug 9, 2016 · US
Three-dimensional integrated circuit device fabrication including wafer scale membrane
US-9412620-B2 · Aug 9, 2016 · US
MOSFETs with Multiple Dislocation Planes
US-2016211362-A1 · Jul 21, 2016 · US
Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layer
US-9397009-B2 · Jul 19, 2016 · US
Method, system, and apparatus for preparing substrates and bonding semiconductor layers to substrates
US-9390942-B2 · Jul 12, 2016 · US
Peeling Method and Method of Manufacturing Semiconductor Device
US-2016190219-A1 · Jun 30, 2016 · US
Method of forming channel region dopant control in fin field effect transistor
US-9379185-B2 · Jun 28, 2016 · US
Method to form dual channel semiconductor material fins
US-9362179-B1 · Jun 7, 2016 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10P95/402?
- CPC H10P95/402 is the Cooperative Patent Classification code for “of silicon bodies.”
- How many patents are filed under CPC H10P95/402 (of silicon bodies)?
- Our database includes 234 publications tagged with this CPC code.
- Is patent activity under CPC H10P95/402 growing?
- Publication counts under this code: 13 in 2024 vs 9 in 2025 (latest complete years).