Semiconductor Device Having an Impurity Concentration and Method of Manufacturing Thereof

Patent metadata

Field	Value
Publication number	US-2016336409-A1
Application number	US-201615220939-A
Country	US
Kind code	A1
Filing date	Jul 27, 2016
Priority date	Jun 19, 2014
Publication date	Nov 17, 2016
Grant date	—

Abstract

A method of manufacturing a semiconductor device includes irradiating the semiconductor body with particles through a first side of the semiconductor body, removing at least a part of impurities from an irradiated part of the semiconductor body by out-diffusion during thermal treatment in a temperature range between 450° C. to 1200° C., and forming a first load terminal structure at the first side of the semiconductor body.

First claim

What is claimed is:

1 . A method of manufacturing a semiconductor device, the method comprising:
irradiating the semiconductor body with particles through a first side of the semiconductor body; removing at least a part of impurities from an irradiated part of the semiconductor body by out-diffusion during thermal treatment. in a temperature range between 450° C. to 1200° C.; and forming a first load terminal structure at the first side of the semiconductor body.

2 . The method of claim 1 , wherein the semiconductor device is a vertical semiconductor device, the method further comprising:
forming a second load terminal structure at a second side of the semiconductor body opposite to the first side.

3 . The method of claim 1 , wherein the vertical semiconductor device is a semiconductor diode, the method further comprising:
forming an anode region in the semiconductor body by introducing p-type dopants through the first side into the semiconductor body; and forming a cathode region in the semiconductor body by introducing n-type dopants through a second side of the semiconductor body into the semiconductor body, the second side being opposite the first side.

4 . The method of claim 1 , wherein the vertical semiconductor device is one of an insulated gate field effect transistor and an insulated gate bipolar transistor, the method further comprising:
forming a control terminal structure at the first side by forming a gate dielectric structure and a gate electrode structure at the first side; forming one of a source and an emitter at the first side by introducing dopants through the first side; and forming one of a drain and a collector at a second side of the semiconductor body opposite to the first side by introducing dopants through the second side.

5 . The method of claim 1 , wherein the semiconductor device is a lateral semiconductor device, the method further comprising:
forming a second load terminal structure at the first side of the semiconductor body.

6 . The method of claim 1 , wherein the impurities include at least one of nitrogen and carbon.

7 . A semiconductor device, comprising:
a silicon, body having opposite first and second sides, a first part of the silicon. body adjoining the first side and a second part of the silicon body being disposed between the first part and the second side, wherein an average concentration of one of nitrogen and carbon in the first part is less than 60% of an average concentration of the one of nitrogen and carbon in the second part.

8 . The semiconductor device of claim 7 , wherein the silicon body is a magnetic Czochralski silicon body.

9 . The semiconductor device of claim 7 , further comprising a third part of the silicon body between the second side and the second part, wherein the average concentration of the one of nitrogen and carbon in the third part is less than 60% of the average concentration of the one of nitrogen and carbon in the second part.

10 . The semiconductor device of claim 7 , wherein the average concentration of the one of nitrogen and carbon in the second part differs by less than 10% along a vertical direction between the first and second sides.

11 . The semiconductor device of claim 7 , wherein a vertical distance between the first side and the second part ranges between 10 μm and 200 μm.

12 . The semiconductor device of claim 7 , wherein the semiconductor device is a vertical power semiconductor device comprising a first load terminal structure at the first side and a second load terminal structure at the second side.

13 . The semiconductor device of claim 7 , further comprising a transition region between the first and second parts, wherein a ratio of an average gradient α 2 of the concentration of the one of nitrogen and carbon in the transition region and an average gradient α 1 of the concentration of the one of nitrogen and carbon in the first part is greater than 3.

14 . The semiconductor device of claim 7 , further comprising a transition region between the first and second parts, wherein a thickness t 2 of the transition region ranges between 1% to 30% of a thickness t 1 of the first part.

Assignees

• Infineon Technologies Ag

Inventors

• Schulze Hans-Joachim

Classifications

• H10P36/03

  within silicon bodies · CPC title

• H10P34/40 Primary

  with high-energy radiation · CPC title

• H10P30/204

  into Group IV semiconductors · CPC title

• H10P30/21

  of electrically active species · CPC title

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title