Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-10332985-B2
Application number	US-201815940423-A
Country	US
Kind code	B2
Filing date	Mar 29, 2018
Priority date	Aug 31, 2017
Publication date	Jun 25, 2019
Grant date	Jun 25, 2019

Abstract

A method of manufacturing a semiconductor device includes forming a fin structure having a stack of alternating first semiconductor layers and second semiconductor layers on a substrate. The first and second semiconductor layers include first end portions on either side of a second portion along a length of the first and second semiconductor layers. The first and second semiconductor layers are formed of different materials. The second portion of the first semiconductor layers is removed to form spaces. A mask layer is formed over the second portion of an uppermost second semiconductor layer above the spaces. The first portions of first and second semiconductor layers are irradiated with radiation from a radiation source to cause material from the first portions of the first and second semiconductor layers to combine with each other.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, comprising:
forming a fin structure having a stack of alternating first semiconductor layers and second semiconductor layers on a substrate,
wherein the first and second semiconductor layers include first end portions on either side of a second portion along a length of the first and second semiconductor layers, and
wherein the first and second semiconductor layers are formed of different materials;
removing the second portion of the first semiconductor layers to form spaces;
forming a mask layer over the second portion of an uppermost second semiconductor layer above the spaces; and
selectively annealing the first portions of the first and second semiconductor layers with radiation from a radiation source to cause material from the first portions of the first and second semiconductor layers to combine with each other while the mask layer is over the second portion of the uppermost second semiconductor layer above the spaces.

2. The method according to claim 1 , wherein the radiation source is a laser.

3. The method according to claim 2 , wherein the laser has a wavelength of about 150 nm to about 2300 nm.

4. The method according to claim 1 , wherein the first and second semiconductor layers are selected from the group consisting of Si, Ge, SiGe, GeSn, Si/SiGe/Ge/GeSn, SiGeSn, and combinations thereof.

5. The method according to claim 4 , wherein the first semiconductor layer comprises Si x Ge 1-x , where 0.1≤x≤0.9, and the second semiconductor layer comprises Si or Ge.

6. The method according to claim 1 , wherein a thickness t 2 of the second semiconductor layers and a thickness t 1 of the first semiconductor layers are related as t 2 /t 1 =0.2 to 5.

7. The method according to claim 1 , wherein a thickness is of the first portions where the first and second semiconductor layers combined with each other and a thickness t 2 of the second semiconductor layers are related as ts/t 2 =(0.15 to 6)*n, where n=the number of second semiconductor layers.

8. The method according to claim 1 , further comprising removing the mask layer after irradiating the first portions of the first and second semiconductor layers.

9. The method according to claim 8 , further comprising forming a gate electrode structure wrapping around the second semiconductor layers.

10. A method of manufacturing a semiconductor device, comprising:
forming a first semiconductor layer on a substrate;
forming a second semiconductor layer on the first semiconductor layer;
forming another first semiconductor layer on the second semiconductor layer;
forming another second semiconductor layer on the another first semiconductor layer,
wherein the first and second semiconductor layers are formed of different materials,
patterning the semiconductor layers to form a fin structure;
wherein the fin structure includes a channel region and source/drain regions on each side of the channel region;
removing a portion of the first semiconductor layers in the channel region to form spaces;
forming a mask layer over an uppermost second semiconductor layer above the spaces; and
selectively annealing the source/drain regions of the first and second semiconductor layers by laser radiation while the mask layer is over the uppermost second semiconductor layer above the spaces.

11. The method according to claim 10 , wherein the laser has a wavelength of about 150 nm to about 2300 nm.

12. The method according to claim 10 , wherein the first and second semiconductor layers are selected from the group consisting of Si, Ge, SiGe, GeSn, Si/SiGe/Ge/GeSn, SiGeSn, and combinations thereof.

13. The method according to claim 10 , wherein the first semiconductor layer comprises Si x Ge 1-x , where 0.1≤x≤0.9, and the second semiconductor layer comprises Si or Ge.

14. The method according to claim 10 , wherein a thickness t 2 of the second semiconductor layers and a thickness t 1 of the first semiconductor layers are related as t 2 /t 1 =0.2 to 5.

15. The method according to claim 10 , wherein a thickness is of the source/drain regions after exposure to laser radiation and a thickness t 2 of the second semiconductor layers are related as ts/t 2 =(0.15 to 6)*n, where n=the number of second semiconductor layers.

16. The method according to claim 10 , further comprising forming an insulating layer on the semiconductor substrate before forming the first and second semiconductor layers.

17. A method of manufacturing a semiconductor device, comprising:
forming a first semiconductor layer on a substrate;
forming a second semiconductor layer on the first semiconductor layer;
forming another first semiconductor layer on the second semiconductor layer,
wherein the first and second semiconductor layers are formed of different materials;
patterning the semiconductor layers to form a fin structure;
wherein the fin structure includes a channel region and source/drain regions on each side of the channel region;
removing a first portion of the first semiconductor layer adjacent the substrate in the channel region to form a first space adjacent the substrate;
removing a second portion of the second semiconductor layer in the channel region to form a second space above the first space;
forming a mask layer over an uppermost first semiconductor layer above the first and second spaces; and
annealing the source/drain regions of the first and second semiconductor layers by laser radiation while the mask layer is over the uppermost first semiconductor layer above the first and second spaces.

18. The method according to claim 17 , wherein the first and second semiconductor layers are selected from the group consisting of Si, Ge, SiGe, GeSn, Si/SiGe/Ge/GeSn, SiGeSn, and combinations thereof.

19. The method according to claim 17 , wherein the first semiconductor layer comprises Si x Ge 1-x , where 0.1≤x≤0.9, and the second semiconductor layer comprises Si or Ge.

20. The method according to claim 17 , further comprising forming an insulating layer on the semiconductor substrate before forming the first and second semiconductor layers.

Assignees

• Taiwan Semiconductor Mfg Co Ltd
• Univ Nat Taiwan

Inventors

• Wong I-Hsieh
• Pan Samuel C
• Liu Chee-Wee
• Lan Huang-Siang
• Tsai Chung-En
• Lu Fang-Liang

Classifications

• H10P30/204

  into Group IV semiconductors · CPC title

• H10P30/21

  of electrically active species · CPC title

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P50/642

  Chemical etching · CPC title

• H10P34/42

  with electromagnetic radiation, e.g. laser annealing (laser cutting H10P54/20) · CPC title