Systems and methods for retaining inflight data during a power loss event
US-12205658-B2 · Jan 21, 2025 · US
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Singidi Harish patents
Singidi Harish is listed as an inventor on 42 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Singidi Harish |
| Total patents | 42 |
| First publication | Mar 16, 2017 |
| Latest publication | Jan 21, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Aggressive quick-pass multiphase programming for voltage distribution state separation in non-volatile memory
US-11854611-B2 · Dec 26, 2023 · US
Dynamic valley searching in solid state drives
US-11727996-B2 · Aug 15, 2023 · US
Systems and methods for retaining inflight data during a power loss event
US-2023129097-A1 · Apr 27, 2023 · US
Dynamic Valley Searching in Solid State Drives
US-2023023725-A1 · Jan 26, 2023 · US
Level dependent error correction code protection in multi-level non-volatile memory
US-11527300-B2 · Dec 13, 2022 · US
Aggressive Quick-Pass Multiphase Programming for Voltage Distribution State Separation in Non-Volatile Memory
US-2022375513-A1 · Nov 24, 2022 · US
Dynamic valley searching in solid state drives
US-11468953-B2 · Oct 11, 2022 · US
Block read count voltage adjustment
US-11456037-B2 · Sep 27, 2022 · US
Dynamic Valley Searching in Solid State Drives
US-2022293191-A1 · Sep 15, 2022 · US
Recent patents
Latest publications not already listed above.
Level Dependent Error Correction Code Protection in Multi-Level Non-Volatile Memory
US-2022068423-A1 · Mar 3, 2022 · US
Dynamic error handling in a memory system
US-11126495-B2 · Sep 21, 2021 · US
Block read count voltage adjustment
US-2021264991-A1 · Aug 26, 2021 · US
Implementing sticky read using error control success rate associated with a memory sub-system
US-11024394-B2 · Jun 1, 2021 · US
SLC page read
US-10755793-B2 · Aug 25, 2020 · US
Implementing sticky read using error control success rate associated with a memory sub-system
US-2020234775-A1 · Jul 23, 2020 · US
Implementing sticky read using error control success rate associated with a memory sub-system
US-10658047-B1 · May 19, 2020 · US
Implementing sticky read using error control success rate associated with a memory sub-system
US-2020135279-A1 · Apr 30, 2020 · US
Secure erase for data corruption
US-10522229-B2 · Dec 31, 2019 · US
Optimized scan interval
US-10446197-B2 · Oct 15, 2019 · US
Correcting power loss in NAND memory devices
US-10430116-B2 · Oct 1, 2019 · US
Managing partial superblocks in a NAND device
US-10372355-B2 · Aug 6, 2019 · US
Block read count voltage adjustment
US-10366763-B2 · Jul 30, 2019 · US
Tracking data temperatures of logical block addresses
US-10365854-B1 · Jul 30, 2019 · US
NAND cell encoding to improve data integrity
US-10360947-B2 · Jul 23, 2019 · US
NAND temperature data management
US-10354732-B2 · Jul 16, 2019 · US
Read voltage calibration based on host IO operations
US-10347344-B2 · Jul 9, 2019 · US
Managing partial superblocks in a nand device
US-2019205043-A1 · Jul 4, 2019 · US
Preemptive idle time read scans
US-10283205-B2 · May 7, 2019 · US
Slc page read
US-2019130983-A1 · May 2, 2019 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Micron Technology Inc | 26 |
| Sandisk Technologies Llc | 8 |
| Western Digital Tech Inc | 6 |
| Sandisk Technologies Inc | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G11C16/26 | 29 |
| G11C16/0483 | 20 |
| G11C11/5642 | 20 |
| G11C29/028 | 20 |
| G11C29/021 | 18 |