Implementing sticky read using error control success rate associated with a memory sub-system

Patent metadata

Field	Value
Publication number	US-11024394-B2
Application number	US-202016844269-A
Country	US
Kind code	B2
Filing date	Apr 9, 2020
Priority date	Oct 31, 2018
Publication date	Jun 1, 2021
Grant date	Jun 1, 2021

Abstract

A memory sub-system can be determined to be operating within a target operating characteristic based on a threshold success rate associated with error control operations using a particular parameter. Upon determining that the memory sub-system is operating within the target operating characteristic, a sticky read mode is entered by performing subsequent read operations using the particular parameter. It is determined that additional error control operations are triggered for at least a first threshold number of read operations using the particular parameter during the sticky read mode. Upon determining that the additional error control operations are triggered for at least the first threshold number of read operations using the particular parameter during the sticky read mode, the sticky read mode is exited by performing further read operations using a default parameter associated with the memory sub-system.

First claim

What is claimed is:

1. A system comprising:
a memory component; and
a processing device, operatively coupled with the memory component, to perform operations comprising:
determining that the memory component is operating, using a particular parameter, within a target operating characteristic;
performing subsequent read operations using the particular parameter;
determining that error control operations are triggered for at least a first threshold number of read operations using the particular parameter; and
performing further read operations using a default parameter.

2. The system of claim 1 , wherein the target operating characteristic corresponds to a first threshold range of temperature condition and a second threshold range of temperature condition associated with the memory component.

3. The system of claim 2 , wherein the first threshold range of temperature condition is associated with the memory component when user data is written to the memory component and the second threshold range of temperature condition is associated with the memory component when user data is read from the memory component.

4. The system of claim 2 , wherein the second threshold range of temperature condition is associated with the memory component when user data is written to the memory component and the first threshold range of temperature condition is associated with the memory component when user data is read from the memory component.

5. The system of claim 1 , wherein determining that the memory component is operating within the target operating characteristic is based on a threshold success rate associated with a plurality of error control operations while performing read operations.

6. The system of claim 1 , wherein determining that the memory component is operating within the target operating characteristic comprises determining that the particular parameter retrieves user data for at least a second threshold number of error control operations out of a plurality of error control operations while performing read operations.

7. The system of claim 1 , wherein determining that the error control operations are triggered for at least the first threshold number of read operations using the particular parameter comprises:
determining that the error control operations are triggered for at least the first threshold number of read operations out of a specified number of read operations using the particular parameter.

8. A method comprising:
determining that a particular read offset successfully retrieves user data for at least a first threshold number of error control operations while performing read operations;
performing subsequent read operations using the particular read offset; and
performing, by a processing device, further read operations using a default read offset upon determining that additional error control operations are triggered while using the particular read offset.

9. The method of claim 8 , wherein determining that the particular read offset successfully retrieves the user data for at least the first threshold number of error control operations while performing read operations comprises:
determining that the particular read offset successfully retrieves the user data for at least the first threshold number of error control operations out of a specified number of consecutive error control operations while performing read operations.

10. The method of claim 8 , wherein the particular read offset is based on a threshold voltage applied to a memory component to retrieve the user data.

11. The method of claim 8 , wherein determining that the additional error control operations are triggered while using the particular read offset comprises:
determining that the additional error control operations are triggered for a second threshold number of read operations while using the particular read offset.

12. The method of claim 8 , wherein the default read offset is different than the particular read offset.

13. The method of claim 12 , wherein the default read offset is set to a calibrated read offset derived based on operation of a memory component over a period of time.

14. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device operatively coupled with a memory component, cause the processing device to:
determine that the memory component is operating, using a particular parameter, within a target operating characteristic;
perform subsequent read operations using the particular parameter;
determine that error control operations are triggered for at least a first threshold number of read operations using the particular parameter; and
perform further read operations using a default parameter.

15. The non-transitory computer-readable storage medium of claim 14 , wherein the target operating characteristic corresponds to a first threshold range of temperature condition and a second threshold range of temperature condition associated with the memory component.

16. The non-transitory computer-readable storage medium of claim 15 , wherein the first threshold range of temperature condition is associated with the memory component when user data is written to the memory component and the second threshold range of temperature condition is associated with the memory component when user data is read from the memory component.

17. The non-transitory computer-readable storage medium of claim 15 , wherein the second threshold range of temperature condition is associated with the memory component when user data is written to the memory component and the first threshold range of temperature condition is associated with the memory component when user data is read from the memory component.

18. The non-transitory computer-readable storage medium of claim 14 , wherein the particular parameter is different than the default parameter.

19. The non-transitory computer-readable storage medium of claim 14 , wherein to determine that the memory component is operating within the target operating characteristic, the processing device is to:
determine that the particular parameter retrieves user data for at least a second threshold number of error control operations out of a plurality of error control operations while performing read operations.

20. The non-transitory computer-readable storage medium of claim 14 , wherein to determine that the error control operations are triggered for at least the first threshold number of read operations using the particular parameter, the processing device is to:
determine that the error control operations are triggered for at least the first threshold number of read operations out of a specified number of read operations using the particular parameter.

Assignees

• Micron Technology Inc

Inventors

• Singidi Harish
• Muchherla Kishore
• Malshe Ashutosh
• Rayaprolu Vamsi
• Ratnam Sampath
• Padilla Jr Renato
• Miller Michael

Classifications

• G11C2029/5002

  Characteristic · CPC title

• G11C29/46

  Test trigger logic · CPC title

• G11C29/44

  Indication or identification of errors, e.g. for repair · CPC title

• G11C29/021

  in voltage or current generators · CPC title

• G11C16/26 Primary

  Sensing or reading circuits; Data output circuits · CPC title