Annealed seed layer for magnetic random access memory
US-10700263-B2 · Jun 30, 2020 · US
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Nowak Janusz J patents
Nowak Janusz J is listed as an inventor on 34 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Nowak Janusz J |
| Total patents | 34 |
| First publication | Jan 6, 2015 |
| Latest publication | Jun 30, 2020 |
Notable patents
Publications ranked by popularity score, then publication date.
Combined CMP and RIE contact scheme for MRAM applications
US-10644233-B2 · May 5, 2020 · US
Optimized perpendicular magnetic free layer stack with a crystalline grain growth controlling layer
US-2020106003-A1 · Apr 2, 2020 · US
Pretreatment of iron-based substrates for electroless plating
US-10577692-B2 · Mar 3, 2020 · US
Spin transfer torque cell for magnetic random access memory
US-10424727-B2 · Sep 24, 2019 · US
Annealed seed layer for magnetic random access memory
US-2019237659-A1 · Aug 1, 2019 · US
Spin transfer torque cell for magnetic random access memory
US-2019221738-A1 · Jul 18, 2019 · US
Spin transfer torque cell for magnetic random access memory
US-10326074-B2 · Jun 18, 2019 · US
Structure and method to reduce shorting and process degradation in stt-MRAM devices
US-10256397-B2 · Apr 9, 2019 · US
Structure and method to reduce shorting and process degradation in STT-MRAM devices
US-10243138-B2 · Mar 26, 2019 · US
Recent patents
Latest publications not already listed above.
Combined CMP and RIE contact scheme for MRAM applications
US-10236443-B2 · Mar 19, 2019 · US
Combined cmp and rie contact scheme for mram applications
US-2018254411-A1 · Sep 6, 2018 · US
Combined cmp and rie contact scheme for mram applications
US-2018254410-A1 · Sep 6, 2018 · US
Pretreatment of iron-based substrates for electroless plating
US-2018187309-A1 · Jul 5, 2018 · US
Structure and method to reduce shorting and process degradation in stt-mram devices
US-2018190901-A1 · Jul 5, 2018 · US
Structure and method to reduce shorting and process degradation in stt-mram devices
US-2018190900-A1 · Jul 5, 2018 · US
Combined CMP and RIE contact scheme for MRAM applications
US-10014464-B1 · Jul 3, 2018 · US
Structure and method to reduce shorting and process degradation in STT-MRAM devices
US-9960347-B2 · May 1, 2018 · US
Spin transfer torque cell for magnetic random access memory
US-2017338407-A1 · Nov 23, 2017 · US
Spin transfer torque cell for magnetic random access memory
US-9793471-B2 · Oct 17, 2017 · US
Structure and method to reduce shorting and process degradation in stt-mram devices
US-2017229641-A1 · Aug 10, 2017 · US
Structure and method to reduce shorting and process degradation in STT-MRAM devices
US-9705071-B2 · Jul 11, 2017 · US
Structure and method to reduce shorting and process degradation in stt-mram devices
US-2017148976-A1 · May 25, 2017 · US
Structure and fabrication of memory array with epitaxially grown memory elements and line-space patterns
US-9478736-B2 · Oct 25, 2016 · US
Spin torque transfer MRAM device formed on silicon stud grown by selective epitaxy
US-9450179-B2 · Sep 20, 2016 · US
Spin torque transfer mram device formed on silicon stud grown by selective epitaxy
US-2016248003-A1 · Aug 25, 2016 · US
Spin transfer torque cell for magnetic random access memory
US-2016218281-A1 · Jul 28, 2016 · US
Spin torque transfer MRAM device formed on silicon stud grown by selective epitaxy
US-9373783-B1 · Jun 21, 2016 · US
Spin transfer torque cell for magnetic random access memory
US-9318698-B2 · Apr 19, 2016 · US
Spin transfer torque cell for magnetic random access memory
US-2015236252-A1 · Aug 20, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 34 |
| Gaidis Michael C | 2 |
| Nowak Janusz J | 2 |
| Sun Jonathan Z | 1 |
| Worledge Daniel C | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.