Combined CMP and RIE contact scheme for MRAM applications

Patent metadata

Field	Value
Publication number	US-10236443-B2
Application number	US-201715800917-A
Country	US
Kind code	B2
Filing date	Nov 1, 2017
Priority date	Mar 1, 2017
Publication date	Mar 19, 2019
Grant date	Mar 19, 2019

Abstract

A method is presented for establishing a top contact to a magnetic tunnel junction (MTJ) device, the method including selectively etching, via a first etching process, an oxide layer to expose a top surface of a nitride layer of a dummy fill shape and selectively etching, via a second etching process, a top portion of the nitride layer of the dummy fill shape to expose a top surface thereof. The method further includes selectively etching, via the second etching process, the oxide layer to expose a top surface of a nitride layer of the MTJ device, and selectively etching, via the first etching process, a top portion of the nitride layer of the MTJ device to expose a top surface thereof such that a height of the MTJ device is approximately equal to a height of the dummy fill shape.

First claim

What is claimed is:

1. A method of establishing a top contact to a magnetic tunnel junction (MTJ) device, the method comprising:
selectively etching, via a first etching process, a first dielectric layer to expose a top surface of a second dielectric layer of a dummy fill shape;
selectively etching, via a second etching process, a top portion of the second dielectric layer of the dummy fill shape to expose a top surface thereof;
selectively etching, via the second etching process, the first dielectric layer to expose a top surface of a third dielectric layer of the MTJ device; and
selectively etching, via the first etching process, a top portion of the third dielectric layer of the MTJ device to expose a top surface thereof such that a height of the MTJ device is approximately equal to a height of the dummy fill shape.

2. The method of claim 1 , wherein the first etching process is chemical-mechanical planarization (CMP).

3. The method of claim 1 , wherein the second etching process is reactive ion etching (RIE).

4. The method of claim 1 , wherein the dummy fill shape has a first height and the MTJ device has a second height, the first height being greater than the second height.

5. The method of claim 1 , wherein etching, via the first etching process, is based on a predetermined height offset between the dummy fill shape and the MTJ device.

6. The method of claim 1 , wherein the first dielectric layer is an inter-level dielectric (ILD).

7. The method of claim 1 , wherein the second dielectric layer is silicon nitride (SiN).

8. A method of establishing a top contact for a plurality of magnetic tunnel junction (MTJ) devices, the method comprising:
planarizing the MTJ devices by alternating selective chemical-mechanical planarization (CMP) and reactive ion etch (RIE) processes;
depositing a stack of conducting layers;
depositing a first photoresist;
etching the first photoresist to expose a top surface of the stack of conducting layers;
depositing a first dielectric layer;
etching the first dielectric layer to form trenches; and
filling the trenches with a conducting material.

9. The method of claim 8 , wherein the stack of conducting layers includes a first layer, a second layer, and a third layer.

10. The method of claim 9 , wherein the first layer is a first tantalum nitride (TaN) layer, the second layer is a ruthenium (Ru) layer, and the third layer is a second tantalum nitride (TaN) layer.

11. The method of claim 10 , wherein the first and second TaN layers have a thickness of about 5 nm.

12. The method of claim 10 , wherein a thickness of the Ru layer is about 20 nm.

13. The method of claim 8 , wherein a second dielectric layer and a second photoresist are deposited before the first dielectric layer.

14. The method of claim 13 , wherein the second photoresist is etched to expose the trenches.

15. The method of claim 14 , wherein the conducting material is copper (Cu).

16. The method of claim 15 , wherein the Cu contacts a top surface of the stack of conducting layers to create a metal trench Cu lines over the MTJ devices.

Assignees

• IBM

Inventors

• Lofaro Michael F
• Marchack Nathan P
• Nowak Janusz J
• O'Sullivan Eugene J

Classifications

• H01L43/08

  Electricity · mapped topic

• H01L27/222

  Electricity · mapped topic

• H01L43/02

  Electricity · mapped topic

• H01L43/12 Primary

  Electricity · mapped topic

• H10B61/00

  Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices · CPC title