Interrupt messaging technologies
US-2025335238-A1 · Oct 30, 2025 · US
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Jayakumar Sarathy patents
Jayakumar Sarathy is listed as an inventor on 66 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Jayakumar Sarathy |
| Total patents | 66 |
| First publication | Apr 12, 2016 |
| Latest publication | Oct 30, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Firmware first handling of a machine check event
US-12399780-B2 · Aug 26, 2025 · US
Decoupling silicon initialization and bootloader by providing silicon initialization service
US-12379934-B2 · Aug 5, 2025 · US
Methods and apparatus to perform a pseudo-S3 protocol to update firmware and/or activate new firmware with a warm reset
US-12223308-B2 · Feb 11, 2025 · US
Modular microcode (uCode) patch method to support runtime persistent update
US-12164906-B2 · Dec 10, 2024 · US
Seamless SMM global driver update base on SMM root of trust
US-12130924-B2 · Oct 29, 2024 · US
Apparatus and Method for an Efficient System Management Mode
US-2024320002-A1 · Sep 26, 2024 · US
Apparatus, computer-readable medium, and method for increasing memory error handling accuracy
US-2024241805-A1 · Jul 18, 2024 · US
Update of boot code handlers
US-12008359-B2 · Jun 11, 2024 · US
Firmware Apparatus, Device, Method and Computer Program
US-2024184621-A1 · Jun 6, 2024 · US
Recent patents
Latest publications not already listed above.
Microcode(uCode) hot-upgrade method for bare metal cloud deployment
US-11941391-B2 · Mar 26, 2024 · US
Apparatus and method to identify the source of an interrupt
US-11900115-B2 · Feb 13, 2024 · US
Deployment of BIOS to operating system data exchange
US-11809878-B2 · Nov 7, 2023 · US
Firmware first handling of a machine check event
US-2023315575-A1 · Oct 5, 2023 · US
Methods and apparatus to perform a pseudo-s3 protocol to update firmware and/or activate new firmware with a warm reset
US-2023305834-A1 · Sep 28, 2023 · US
Os-managed bios modules
US-2023169171-A1 · Jun 1, 2023 · US
Apparatus and method to identify the source of an interrupt
US-11614939-B2 · Mar 28, 2023 · US
Embedded controller and memory to store memory error information
US-2022350500-A1 · Nov 3, 2022 · US
CPU hot-swapping
US-11327918-B2 · May 10, 2022 · US
Hardware unit for reverse translation in a processor
US-11307996-B2 · Apr 19, 2022 · US
Decoupling Silicon Initialization and Bootloader by providing Silicon Initialization Service
US-2022019444-A1 · Jan 20, 2022 · US
Method device and system for upgradable microcode (ucode) loading and activation in runtime for bare metal deployment
US-2022019426-A1 · Jan 20, 2022 · US
Technologies for secure and efficient native code invocation for firmware services
US-11222119-B2 · Jan 11, 2022 · US
Seamless system management mode code injection
US-2021365559-A1 · Nov 25, 2021 · US
Protected runtime mode
US-11138072-B2 · Oct 5, 2021 · US
Arbiter based serialization of processor system management interrupt events
US-11074204-B2 · Jul 27, 2021 · US
Read from memory instructions, processors, methods, and systems, that do not take exception on defective data
US-11068339-B2 · Jul 20, 2021 · US
Cpu hot-swapping
US-2021209052-A1 · Jul 8, 2021 · US
Apparatus and method to identify the source of an interrupt
US-11048512-B1 · Jun 29, 2021 · US
Delayed error processing
US-10929232-B2 · Feb 23, 2021 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 66 |
| Jayakumar Sarathy | 2 |
| Kumar Mohan J | 2 |
| Vargas Jose A | 1 |
| Kinney Michael D | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F9/4401 | 17 |
| Y02D10/00 | 12 |
| G06F9/4403 | 11 |
| G06F9/30098 | 11 |
| G06F9/445 | 10 |