Latency buffer circuit with adaptable time shift
US-10484165-B2 · Nov 19, 2019 · US
Correction by an elastic buffer
Correction by an elastic buffer · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H04L7/005 |
| Official title | {Correction by an elastic buffer} |
| Display label | Correction by an elastic buffer |
| Total patents | 150 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2015 | 14 |
| 2016 | 16 |
| 2017 | 17 |
| 2018 | 8 |
| 2019 | 12 |
| 2020 | 7 |
| 2021 | 19 |
| 2022 | 15 |
| 2023 | 15 |
| 2024 | 9 |
| 2025 | 16 |
| 2026 | 2 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Low-latency pipeline for media-to-ethernet frame packaging
US-10469633-B2 · Nov 5, 2019 · US
Network Packet Generator Employing Multiple Header Templates and Configurable Hardware Registers
US-2019306288-A1 · Oct 3, 2019 · US
Reducing timing uncertainty
US-10298267-B2 · May 21, 2019 · US
Data transmission between asychronous environments
US-10250419-B2 · Apr 2, 2019 · US
Method and apparatus for controlling an average fill level of an asynchronous first-in-first-out, fifo
US-2018373495-A1 · Dec 27, 2018 · US
Data processor, data processing method and communication device
US-10128818-B2 · Nov 13, 2018 · US
Sampling rate synchronization between transmitters and receivers
US-2018316482-A1 · Nov 1, 2018 · US
Data phase tracking device, data phase tracking method and communication device
US-2018302211-A1 · Oct 18, 2018 · US
Re-timer network insertion
US-10063365-B1 · Aug 28, 2018 · US
Wafer-level package having asynchronous FIFO buffer used to deal with data transfer between different dies and associated method
US-10037293-B2 · Jul 31, 2018 · US
Data processor, data processing method and communication device
US-2018175830-A1 · Jun 21, 2018 · US
Data transmitting/receiving apparatus and data transmitting/receiving method
US-2018077269-A1 · Mar 15, 2018 · US
Reducing Timing Uncertainty
US-2017359088-A1 · Dec 14, 2017 · US
Method, Apparatus And System For Deskewing Parallel Interface Links
US-2017346617-A1 · Nov 30, 2017 · US
Method, apparatus and system for deskewing parallel interface links
US-9832006-B1 · Nov 28, 2017 · US
Oversampling CDR which compensates frequency difference without elasticity buffer
US-9832008-B2 · Nov 28, 2017 · US
Independent UART BRK detection
US-9825754-B2 · Nov 21, 2017 · US
Data transmission beetween asychronous environments
US-2017317862-A1 · Nov 2, 2017 · US
Clock domain bridge static timing analysis
US-9722767-B2 · Aug 1, 2017 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H04L7/005?
- CPC H04L7/005 is the Cooperative Patent Classification code for “Correction by an elastic buffer.”
- How many patents are filed under CPC H04L7/005 (Correction by an elastic buffer)?
- Our database includes 150 publications tagged with this CPC code.
- Is patent activity under CPC H04L7/005 growing?
- Publication counts under this code: 9 in 2024 vs 16 in 2025 (latest complete years).