Low-latency pipeline for media-to-ethernet frame packaging

US10469633B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10469633-B2
Application numberUS-201815973572-A
CountryUS
Kind codeB2
Filing dateMay 8, 2018
Priority dateMar 29, 2018
Publication dateNov 5, 2019
Grant dateNov 5, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A conversion pipeline includes a media input stage, a packetizer, a MAC engine and a PHY interface. The media input stage is configured to receive from a media source a sequence of media frames carrying media content. The packetizer is configured to convert the media frames into a sequence of Ethernet packets by generating headers and appending portions of media frames to corresponding generated headers, including appending a first portion of a first media frame to a first generated header before the first media frame is fully received. The MAC engine is configured to commence outputting a first Ethernet packet as an uninterrupted unit, the first Ethernet packet including the first header and payload bits corresponding to the first portion of the first media frame, before the first media frame is fully received. The PHY interface is configured to transmit the Ethernet packets over a network.

First claim

Opening claim text (preview).

The invention claimed is: 1. A conversion pipeline for converting media into Ethernet packets, the conversion pipeline comprising: a memory; a media input stage configured to receive from a media source a sequence of media frames carrying media content; a packetizer configured to convert the media frames into a sequence of Ethernet packets by generating headers on-the-fly, without writing the media frames into the memory, and appending portions of the media frames to corresponding generated headers, including appending a first portion of a first media frame to a first generated header before the first media frame is fully received from the media source; an elasticity buffer, which is configured to compensate for a difference in clock speed between the media input stage and the packetizer, wherein the elasticity buffer has a buffer size that is less than a single media frame; an Ethernet Medium Access Control (MAC) engine configured to commence outputting a first Ethernet packet as an uninterrupted unit, the first Ethernet packet comprising the first header and payload bits corresponding to the first portion of the first media frame, before the first media frame is fully received from the media source; and an Ethernet physical-layer (PHY) interface, configured to transmit the sequence of Ethernet packets over a network. 2. The conversion pipeline according to claim 1 , wherein the packetizer comprises: a header generator configured to generate the headers concurrently with reception of the media frames; and a multiplexer (MUX), configured to interleave the headers with respective payloads that comprise the media content, so as to form a composite output stream. 3. The conversion pipeline according to claim 1 , wherein the packetizer comprises logic circuitry configured to detect frame markers in the sequence of the media frames, and to partition the media content into successive payloads for successive Ethernet packets in accordance with the frame markers. 4. The conversion pipeline according to claim 3 , wherein the packetizer is configured to begin each of the payloads of the Ethernet packets with one of the frame markers. 5. The conversion pipeline according to claim 1 , wherein the media input stage is configured to receive input values from a sensor in addition to receiving the media frames, and wherein the packetizer is configured to convert both the media frames from the media source and the input values from the sensor into the sequence of Ethernet packets. 6. The conversion pipeline according to claim 1 , wherein the media content comprises one or more of: video data, audio data, velocity data, acceleration data, infrared data, radar data, lidar data, ultrasonic imaging data, rangefinder data, proximity data, and collision avoidance data. 7. The conversion pipeline according to claim 1 , wherein the conversion pipeline comprises one or more buffers configured to provide an end-to-end latency that is less than a duration of a single media frame. 8. A method for conversion of media into Ethernet packets in a hardware-implemented conversion pipeline, the method comprising: receiving from a media source a sequence of media frames carrying media content; converting the media frames into a sequence of Ethernet packets by generating headers on-the-fly, without writing the media frames into memory, and appending portions of the media frames to corresponding generated headers, including appending a first portion of a first media frame to a first generated header before the first media frame is fully received from the media source; compensating for a difference in clock speed in the conversion pipeline using an elasticity buffer, wherein the elasticity buffer has a buffer size that is less than a single media frame; commencing outputting a first Ethernet packet as an uninterrupted unit, the first Ethernet packet comprising the first header and payload bits corresponding to the first portion of the first media frame, before the first media frame is fully received from the media source; and transmitting the sequence of Ethernet packets produced by the conversion pipeline through a physical-layer (PHY) interface to a network. 9. The method according to claim 8 , further comprising receiving input values from a sensor in addition to receiving the media frames, and wherein converting the media frames into the Ethernet packets comprises converting both the media frames from the media source and the input values from the sensor into the sequence of Ethernet packets. 10. The method according to claim 8 , wherein receiving the media content comprises receiving one or more of: video data, audio data, velocity data, acceleration data, infrared data, radar data, lidar data, ultrasonic imaging data, rangefinder data, proximity data, and collision avoidance data. 11. The method according to claim 8 , wherein converting the media frames into the Ethernet packets comprises generating the headers concurrently with reception of the media frames, and interleaving the headers with respective payloads that comprise the media content so as to form a composite output stream. 12. The method according to claim 8 , wherein converting the media frames into the Ethernet packets comprises detecting frame markers in the sequence of the media frames, and partitioning the media content into successive payloads for successive Ethernet packets in accordance with the frame markers. 13. The method according to claim 12 , wherein partitioning the media content comprises beginning each of the payloads of the Ethernet packets with one of the frame markers. 14. The method according to claim 8 , wherein converting the media frames into the Ethernet packets comprises buffering the media content in one or more buffers having an end-to-end latency that is less than a duration of a single media frame.

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Classifications

  • involving a wired protocol, e.g. IEEE 1394 (high-speed IEEE 1394 serial bus H04L12/40052) · CPC title

  • in the physical layer [OSI layer 1] · CPC title

  • Protocols for interworking; Protocol conversion · CPC title

  • H04L12/46Primary

    Interconnection of networks · CPC title

  • H04L69/324Primary

    in the data link layer [OSI layer 2], e.g. HDLC · CPC title

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What does patent US10469633B2 cover?
A conversion pipeline includes a media input stage, a packetizer, a MAC engine and a PHY interface. The media input stage is configured to receive from a media source a sequence of media frames carrying media content. The packetizer is configured to convert the media frames into a sequence of Ethernet packets by generating headers and appending portions of media frames to corresponding generate…
Who is the assignee on this patent?
Marvell World Trade Ltd
What technology area does this patent fall under?
Primary CPC classification H04L12/46. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 05 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).