Air inner spacers

Patent metadata

Field	Value
Publication number	US-12376337-B2
Application number	US-202117471859-A
Country	US
Kind code	B2
Filing date	Sep 10, 2021
Priority date	Mar 19, 2021
Publication date	Jul 29, 2025
Grant date	Jul 29, 2025

Abstract

The present disclosure describes a method to form a semiconductor device with air inner spacers. The method includes forming a semiconductor structure on a first side of a substrate. The semiconductor structure includes a fin structure having multiple semiconductor layers on the substrate, an epitaxial structure on the substrate and in contact with the multiple semiconductor layers, a gate structure wrapped around the multiple semiconductor layers, and an inner spacer structure between the gate structure and the epitaxial structure. The method further includes removing a portion of the substrate from a second side of the substrate to expose the epitaxial structure and the inner spacer structure, forming an oxide layer on the epitaxial structure on the second side of the substrate, and removing a portion of the inner spacer structure to form an opening. The second side is opposite to the first side of the substrate.

First claim

What is claimed is:

1. A method, comprising:
forming a semiconductor structure on a first side of a substrate, wherein the semiconductor structure comprises:
a fin structure, on the substrate, comprising a plurality of semiconductor layers;
an epitaxial structure on the substrate and in contact with the plurality of semiconductor layers;
a gate structure wrapped around the plurality of semiconductor layers; and
an inner spacer structure between the gate structure and the epitaxial structure;

removing a portion of the substrate from a second side of the substrate to expose the epitaxial structure and the inner spacer structure, wherein the second side is opposite to the first side of the substrate;
forming an oxide layer on the epitaxial structure on the second side of the substrate; and
removing a portion of the inner spacer structure to form an opening.

2. The method of claim 1 , wherein the forming the oxide layer comprises:
treating the epitaxial structure with a hydrogen plasma; and
treating the epitaxial structure with an oxygen plasma.

3. The method of claim 1 , wherein the removing the portion of the inner spacer structure comprises etching the portion of the inner spacer structure adjacent to the gate structure.

4. The method of claim 1 , wherein the removing the portion of the inner spacer structure comprises etching the portion of the inner spacer structure with a plasma of a fluorine-based etchant, hydrogen, and oxygen.

5. The method of claim 1 , wherein the removing the portion of the inner spacer structure comprises:
etching the portion of the inner spacer structure; and
baking the inner spacer structure.

6. The method of claim 1 , further comprising removing the oxide layer.

7. The method of claim 1 , further comprising forming a dielectric layer on the second side of the substrate to seal the opening.

8. The method of claim 7 , further comprising forming, on the second side of the substrate, a contact structure on the epitaxial structure surrounded by the dielectric layer.

9. A method, comprising:
forming a semiconductor structure, wherein the semiconductor structure comprises:
a fin structure comprising a plurality of semiconductor layers;
an epitaxial structure in contact with the plurality of semiconductor layers;
a contact structure on a first side of the epitaxial structure;
a gate structure wrapped around the plurality of semiconductor layers; and
an inner spacer structure, between the gate structure and the epitaxial structure, comprising a first spacer layer in contact with the epitaxial structure and a second spacer layer in contact with the gate structure;

forming an oxide layer on a second side of the epitaxial structure, wherein the second side is opposite to the first side of the epitaxial structure; and
removing the second spacer layer to form an opening.

10. The method of claim 9 , wherein the forming the oxide layer comprises:
treating the epitaxial structure with a hydrogen plasma; and
treating the epitaxial structure with an oxygen plasma.

11. The method of claim 9 , wherein the removing the second spacer layer comprises etching the second spacer layer with a plasma of a fluorine-based gas, hydrogen, and oxygen.

12. The method of claim 9 , wherein the removing the second spacer layer comprises:
etching the second spacer layer; and
baking the inner spacer structure.

13. The method of claim 9 , further comprising removing the oxide layer.

14. The method of claim 9 , further comprising forming a dielectric layer on the second side of the epitaxial structure to seal the opening.

15. The method of claim 9 , further comprising forming, on the second side of the epitaxial structure, an additional contact structure on the epitaxial structure.

16. A method, comprising:
forming a semiconductor device on a first side of a substrate, wherein the semiconductor device comprises:
a stack of semiconductor layers;
an epitaxial structure in contact with the stack of semiconductor layers;
a gate structure wrapped around the stack of semiconductor layers; and
an inner spacer structure between the gate structure and the epitaxial structure, wherein the inner spacer structure comprises a first spacer layer in contact with the epitaxial structure and a second spacer layer in contact with the gate structure;

removing a portion of the substrate from a second side of the substrate to expose the epitaxial structure and the inner spacer structure, wherein the second side is opposite to the first side of the substrate; and
removing the second spacer layer to form an opening.

17. The method of claim 16 , further comprising:
treating the exposed epitaxial structure with a hydrogen plasma; and
treating the exposed epitaxial structure with an oxygen plasma to form an oxide layer.

18. The method of claim 16 , wherein the removing the second spacer layer comprises etching the second spacer layer with a plasma of a fluorine-based etchant, hydrogen, and oxygen.

19. The method of claim 17 , further comprising:
annealing the inner spacer structure;
removing an oxide layer; and
forming a dielectric layer on the second side of the substrate to seal the opening.

20. The method of claim 19 , further comprising forming, on the second side of the substrate, a contact structure on the epitaxial structure surrounded by the dielectric layer.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lin Fo-Ju
• Lee Fang-Wei
• Chiang Chih-Long
• Lin Li-Te
• Lin Pinyen

Classifications

• H10P50/283

  by chemical means · CPC title

• H10P14/6309

  of silicon in uncombined form, i.e. pure silicon · CPC title

• H10P14/6319

  Formation by plasma treatments, e.g. plasma oxidation of the substrate · CPC title

• H10P50/00 Primary

  Etching of wafers, substrates or parts of devices · CPC title

• H10D64/258

  characterised by the relative positions of the source or drain electrodes with respect to the gate electrode · CPC title