Semiconductor devices and methods for fabrication thereof

Patent metadata

Field	Value
Publication number	US-12363924-B2
Application number	US-202217829717-A
Country	US
Kind code	B2
Filing date	Jun 1, 2022
Priority date	Jun 1, 2022
Publication date	Jul 15, 2025
Grant date	Jul 15, 2025

Abstract

Embodiments of present disclosure provide a MIM capacitor including a straining layer on an electrode, and a high-k dielectric layer formed on the straining layer. The straining layer allows the high-k dielectric layer to be highly crystallized without requiring an extra annealing process. The high crystallization of the high-k dielectric layer results in increased the dielectric value (k-value), thus, improving capacitance density in the MIM capacitor. Some embodiments provide a MIM capacitor device including stacked MIM capacitors with symmetrically arranged high-k dielectric layers and straining layers.

First claim

The invention claimed is:

1. A method for fabricating a capacitor device, comprising:
providing a substrate having first and second conductive features;
depositing a first conductive layer on the substrate;
patterning the first conductive layer to form a first electrode from the first conductive layer;
treating the first electrode to form a first straining layer on the first electrode, wherein the first electrode includes columnar crystal grains and treating the first electrode comprises increasing intragranular strain in the first electrode;
depositing a first high-k dielectric layer on the first straining layer;
depositing a second conductive layer on the first high-k dielectric layer;
patterning the second conductive layer to form a second electrode from the second conductive layer;
depositing a cover dielectric layer over the second electrode;
forming first and second contact openings to expose the first and second conductive features respectively, wherein the first contact opening penetrates the first electrode, and second contact opening penetrates the second electrode; and
filling the first and second contact openings with a conductive material.

2. The method of claim 1 , wherein the first electrode has a degree of intragranular strain in a range between 0.5% and 1.0%.

3. The method of claim 1 , wherein the first electrode includes a transitional metal nitride.

4. The method of claim 3 , wherein the first straining layer comprises an oxide of the transitional metal nitride formed on a grain boundary of the transitional metal nitride.

5. The method of claim 1 , further comprising, prior to depositing the cover dielectric layer,
forming a second straining layer on the second electrode;
depositing a second high-k dielectric layer on the second straining layer; and
forming a third electrode on the second high-k dielectric layer.

6. The method of claim 1 , further comprising, prior to depositing the cover dielectric layer,
depositing a second high-k dielectric layer on the second electrode;
depositing an oxynitride containing layer on the second high-k dielectric layer; and
forming a third electrode on the oxynitride layer.

7. The method of claim 1 , wherein the first straining layer comprises crystal grains between boundaries of the columnar crystal grains of the first electrode.

8. The method of claim 1 , wherein the first straining layer includes a planar portion on a planar surface of the first electrode, and a sidewall portion on sidewalls of the first electrode.

9. A method, comprising:
forming a capacitor device comprising:
a first electrode on a portion of a dielectric layer on a substrate, wherein the first electrode comprises a first material having columnar crystal grains and an intragranular strain greater than about 0.5%;
a first straining layer on the first electrode, wherein the first straining layer comprises crystal grains between boundaries of the columnar crystal grains of the first material;
a first high-k dielectric layer on the first straining layer and the dielectric layer; and
a second electrode on a portion of the first high-k dielectric layer.

10. The method of claim 9 , wherein the first straining layer comprises an oxide of the first material.

11. The method of claim 10 , wherein the first material comprises a nitride of a transitional metal.

12. The method of claim 9 , wherein the first straining layer includes a planar portion on a planar surface of the first electrode, and a sidewall portion on sidewalls of the first electrode.

13. The method of claim 9 , further comprising:
forming a second straining layer on the second electrode;
depositing a second high-k dielectric layer on the second straining layer and the first high-k dielectric layer; and
forming a third electrode on the second high-k dielectric layer.

14. The method of claim 9 , further comprising:
depositing a second high-k dielectric layer on the second electrode and the first high-k dielectric layer;
forming a second straining layer on the second high-k dielectric layer; and
depositing a third electrode on the second straining layer.

15. The method of claim 9 , wherein the first material comprises a nitride of a transitional metal, and the first straining layer comprises an oxide of the first material.

16. A method, comprising, comprising:
forming a first electrode on a portion of a dielectric layer on a substrate, wherein the first electrode comprises a first material having a first thickness;
forming a straining layer on the first electrode, wherein the straining layer comprises an oxide of the first material having a second thickness, and a ratio of the second thickness over the first thickness is in range between 0.1 and 0.2;
depositing a first high-k dielectric layer on the straining layer and the dielectric layer; and
forming a second electrode on a portion of the first high-k dielectric layer, wherein the straining layer is formed on a top surface and sidewalls of the first electrode.

17. The method of claim 16 , wherein the second electrode has a drop wall portion, and the sidewall portion of the straining layer is sandwiched between the drop wall portion of the second electrode and the sidewall of the first electrode.

18. The method of claim 16 , further comprising:
depositing a second high-k dielectric layer in contact with the dielectric layer, wherein the dielectric layer and the straining layer have substantially the same composition, and the first electrode and the second high-k dielectric layer are on opposite sides of the dielectric layer; and
forming a third electrode in contact with the second high-k dielectric layer.

19. The method of claim 16 , wherein the first material has a degree of intragranular strain greater than 0.5%.

20. The method of claim 16 , wherein the first straining layer comprises an oxynitride of a transitional metal.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lin Jen-Po
• Wang Cherng-Yu
• Wei Hsiao-Kuan

Classifications

• H10D1/716

  having vertical extensions · CPC title

• H10D1/68

  Capacitors having no potential barriers · CPC title

• H10D1/043

  using patterning processes to form electrode extensions, e.g. etching · CPC title

• H10D1/042 Primary

  using deposition processes to form electrode extensions · CPC title

• H10D1/696 Primary

  comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688) · CPC title