Contact structure and method of forming

US9831183B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9831183-B2
Application numberUS-201414532886-A
CountryUS
Kind codeB2
Filing dateNov 4, 2014
Priority dateAug 7, 2014
Publication dateNov 28, 2017
Grant dateNov 28, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Contact structures and methods of forming contacts structures are contemplated by this disclosure. A structure includes a dielectric layer over a substrate, an adhesion layer, a silicide, a barrier layer, and a conductive material. The dielectric layer has an opening to a surface of the substrate. The adhesion layer is along sidewalls of the opening. The silicide is on the surface of the substrate. The barrier layer is on the adhesion layer and the silicide, and the barrier layer directly adjoins the silicide. The conductive material is on the barrier layer in the opening.

First claim

Opening claim text (preview).

What is claimed is: 1. A structure comprising: a dielectric layer over a planar top surface of a substrate, the dielectric layer having an opening to an epitaxial layer that extends above the top surface of the substrate; an adhesion layer along sidewalls of the opening, wherein the adhesion layer comprises a metal; a silicide on the planar top surface of the substrate; a barrier layer on the adhesion layer, the barrier layer different than the adhesion layer and comprising a metal nitride of a same metal as in the adhesion layer, the barrier layer including a first region adjacent the silicide and having a first thickness and including a second region adjacent sidewalls of the opening, the second region having a second thickness less than the first thickness, the barrier layer physically contacting the silicide, the adhesion layer extending between the barrier layer and the silicide, wherein an entirety of the silicide comprises a same metal as in the adhesion layer; and a conductive material on the barrier layer in the opening. 2. The structure of claim 1 , wherein the adhesion layer is titanium, the barrier layer is titanium nitride, and the silicide comprises titanium. 3. The structure of claim 1 , wherein a thickness of the adhesion layer is between 5 Å and 50 Å. 4. The structure of claim 1 , wherein a thickness of the silicide is between 40 Å and 250 Å. 5. The structure of claim 1 , wherein a thickness of the first region of the barrier layer is between 15Å and 50 Å and a thickness of the second region of the barrier layer is between 5 Å and 40 Å. 6. The structure of claim 1 , wherein the conductive material is tungsten. 7. A structure comprising: a dielectric layer over a substrate, an opening being through the dielectric layer to an epitaxial layer above a top surface of the substrate; a titanium layer on dielectric sidewalls of the opening; a titanium-containing silicide on the substrate; a titanium nitride layer on the titanium layer and directly on the titanium-containing silicide, no portion of the titanium layer being disposed between at least a portion of the titanium nitride layer and at least a portion of the titanium-containing silicide, wherein the titanium nitride layer has a first thickness where it contacts the titanium-containing silicide and a second thickness, different from the first thickness where it contacts the titanium layer; and a conductive material on the titanium nitride layer in the opening. 8. The structure of claim 7 , wherein a thickness of the titanium layer is between 5 Å and 50 Å. 9. The structure of claim 7 , wherein a thickness of the titanium-containing silicide is between 40 Å and 250 Å. 10. The structure of claim 7 , wherein a thickness of the titanium nitride layer is between 15 Å and 50 Å where it contacts the titanium-containing silicide and is between 5 Å and 40Å where it contacts the titanium layer. 11. The structure of claim 7 , wherein the conductive material is tungsten. 12. The structure of claim 7 , wherein the titanium nitride layer directly adjoins the titanium-containing silicide. 13. A method comprising: forming an opening through a dielectric layer to an epitaxial layer disposed above a top surface of a substrate, a bottom surface of the opening being a surface of a semiconductor material; cleaning the surface using a high-temperature bake at a temperature between about 700° C. and about 900° C.; forming an adhesion layer along sidewalls of the opening and on the surface of the semiconductor material; depositing a barrier layer conformally on the adhesion layer to a first thickness along the sidewalls of the opening and a second thickness along a bottom of the opening, wherein the second thickness is greater than the first thickness, and the barrier layer comprises a metal nitride; after forming the barrier layer, reacting the adhesion layer with the semiconductor material to form a silicide, wherein after the reacting, the barrier layer directly adjoins the silicide; and forming a conductive material on the adhesion layer in the opening. 14. The method of claim 13 , wherein the reacting comprises an anneal. 15. The method of claim 13 , wherein a thickness of the adhesion layer formed on the surface of the semiconductor material is between 50 Å and 300 Å. 16. The method of claim 13 , wherein a thickness of the silicide is between 40 Å and 250 Å. 17. The method of claim 13 , wherein a thickness of the barrier layer is between 5 Å and 50 Å. 18. The method of claim 13 , wherein the conductive material is tungsten. 19. The method of claim 13 , wherein the adhesion layer is titanium, the barrier layer is titanium nitride, and the silicide comprises titanium. 20. A method comprising: etching an opening through a dielectric layer to an epitaxial layer above a top surface of a substrate, a bottom surface of the opening being a surface of a semiconductor material in the substrate; performing a cleaning process on the dielectric layer and the bottom surface; depositing a titanium layer deposited by physical vapor deposition (PVD) along sidewalls of the opening and on the surface of the semiconductor material, a first thickness of the titanium layer on the surface of the semiconductor material being greater than a second thickness of the titanium layer on the sidewalls of the opening, the first thickness being between 50 Å and 300 Å, the second thickness being between 5 Å and 50 Å; depositing a titanium nitride layer deposited by chemical vapor deposition (CVD) on the titanium layer, a third thickness of the titanium nitride layer on the titanium layer on the surface of the semiconductor material being between 15 Å and 50 Å, a fourth thickness of the titanium nitride layer on the titanium layer on the sidewalls of the opening being between 5 Å and 40 Å, with the fourth thickness being greater than the third thickness; after depositing the titanium nitride layer, reacting the titanium layer with the semiconductor material to form a silicide, the reacting comprising using an anneal at a temperature from 400 ° C. to 900 ° C. for a duration of 20 seconds to 180 seconds, after the reacting, a thickness of the silicide being between 40 Å and 250 Å, and the annealing causing all of the titanium layer on the bottom surface of the opening to react with the semiconductor material such that the titanium nitride layer directly adjoins the silicide; and depositing a conductive material on the titanium nitride layer in the opening.

Assignees

Inventors

Classifications

  • using conductive layers comprising silicides · CPC title

  • formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

  • using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

  • by forming openings in the dielectric parts · CPC title

  • by introducing additional elements therein · CPC title

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What does patent US9831183B2 cover?
Contact structures and methods of forming contacts structures are contemplated by this disclosure. A structure includes a dielectric layer over a substrate, an adhesion layer, a silicide, a barrier layer, and a conductive material. The dielectric layer has an opening to a surface of the substrate. The adhesion layer is along sidewalls of the opening. The silicide is on the surface of the substr…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D64/0112. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).