Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance

Patent metadata

Field	Value
Publication number	US-10847618-B2
Application number	US-201816193011-A
Country	US
Kind code	B2
Filing date	Nov 16, 2018
Priority date	Nov 16, 2018
Publication date	Nov 24, 2020
Grant date	Nov 24, 2020

Abstract

A semiconductor device may include a semiconductor layer, spaced apart source and drain regions in the semiconductor layer with a channel region extending therebetween, and a gate on the channel region. The semiconductor device may further include a body contact in the semiconductor layer and comprising a body contact dopant diffusion blocking superlattice extending through the body contact to divide the body contact into a first body contact region and an second body contact region with the second body contact region having a same conductivity and higher dopant concentration than the first body contact region. The body contact dopant diffusion blocking superlattice may include a respective plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

First claim

That which is claimed is:

1. A semiconductor device comprising:
a semiconductor layer;
spaced apart source and drain regions in the semiconductor layer with a channel region extending therebetween;
a gate on the channel region; and
a body contact in the semiconductor layer and physically separated from the source and drain regions, the body contact comprising a body contact dopant diffusion blocking superlattice extending through the body contact to divide the body contact into a first body contact region and a second body contact region with the second body contact region having a same conductivity and higher dopant concentration than the first body contact region;
the body contact dopant diffusion blocking superlattice comprising a respective plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

2. The semiconductor device of claim 1 wherein the source and drain regions and the body contact are on a top side of the semiconductor layer.

3. The semiconductor device of claim 1 wherein the source and drain regions are on a top side of the semiconductor layer, and the body contact is on a back side of the semiconductor layer opposite the top side.

4. The semiconductor device of claim 1 wherein the second body contact region is level with a surface of the semiconductor layer.

5. The semiconductor device of claim 1 wherein the second body contact region is raised above a surface of the semiconductor layer.

6. The semiconductor device of claim 1 wherein the first body contact region comprises a different material than the second body contact region.

7. The semiconductor device of claim 6 wherein the first body contact region comprises silicon; and wherein the second body contact region comprises silicon germanium.

8. The semiconductor device of claim 6 wherein the first body contact region comprises silicon germanium; and wherein the second body contact region comprises silicon.

9. The semiconductor device of claim 1 further comprising a metal contact on the second body contact region.

10. The semiconductor device of claim 9 wherein the metal contact comprises at least one of titanium, cobalt, nickel and platinum.

11. The semiconductor device of claim 1 wherein the base semiconductor monolayers comprise silicon.

12. The semiconductor device of claim 1 wherein the at least one non-semiconductor monolayer comprises oxygen.

13. A semiconductor device comprising:
a semiconductor layer;
spaced apart source and drain regions in the semiconductor layer with a channel region extending therebetween;
a gate on the channel region; and
a body contact in the semiconductor layer and physically separated from the source and drain regions, the body contact comprising a body contact dopant diffusion blocking superlattice extending through the body contact to divide the body contact into a first body contact region and a second body contact region with the second body contact region having a same conductivity and higher dopant concentration than the first body contact region;
the body contact dopant diffusion blocking superlattice comprising a respective plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
wherein the second body contact region is level with a surface of the semiconductor layer.

14. The semiconductor device of claim 13 wherein the source and drain regions and the body contact are on a top side of the semiconductor layer.

15. The semiconductor device of claim 13 wherein the source and drain regions are on a top side of the semiconductor layer, and the body contact is on a back side of the semiconductor layer opposite the top side.

16. The semiconductor device of claim 13 further comprising a metal contact on the second body contact region.

17. A semiconductor device comprising:
a semiconductor layer;
spaced apart source and drain regions in the semiconductor layer with a channel region extending therebetween;
a gate on the channel region; and
a body contact in the semiconductor layer and physically separated from the source and drain regions, the body contact comprising a body contact dopant diffusion blocking superlattice extending through the body contact to divide the body contact into a first body contact region and a second body contact region with the second body contact region having a same conductivity and higher dopant concentration than the first body contact region;
the body contact dopant diffusion blocking superlattice comprising a respective plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
wherein the second body contact region is raised above a surface of the semiconductor layer.

18. The semiconductor device of claim 17 wherein the source and drain regions and the body contact are on a top side of the semiconductor layer.

19. The semiconductor device of claim 17 wherein the source and drain regions are on a top side of the semiconductor layer, and the body contact is on a back side of the semiconductor layer opposite the top side.

20. The semiconductor device of claim 17 further comprising a metal contact on the second body contact region.

Assignees

• Atomera Inc

Inventors

• Takeuchi Hideki
• Connelly Daniel
• Hytha Marek
• Burton Richard
• Mears Robert J

Classifications

• H10D84/834 Primary

  comprising FinFETs · CPC title

• H10D30/6211

  having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates · CPC title

• H10D30/797

  being in source or drain regions, e.g. SiGe source or drain · CPC title

• H10D30/601

  having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  (lightly doped source or drain extensions for TFTs H10D30/6715) · CPC title

• H10D30/0277

  forming conductor-insulator-semiconductor or Schottky barrier source or drain regions · CPC title