Semiconductor chip apparatus and method for checking the integrity of a memory
US-12561483-B2 · Feb 24, 2026 · US
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Sonnekalb Steffen patents
Sonnekalb Steffen is listed as an inventor on 34 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Sonnekalb Steffen |
| Total patents | 34 |
| First publication | Jan 29, 2015 |
| Latest publication | Feb 24, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Storage device and method for modifying memory cells of a storage device
US-12079507-B2 · Sep 3, 2024 · US
Memory integrity check
US-12038808-B2 · Jul 16, 2024 · US
Semiconductor chip apparatus and method for checking the integrity of a memory
US-2023367912-A1 · Nov 16, 2023 · US
Memory integrity check
US-2023359523-A1 · Nov 9, 2023 · US
Storage Device and Method for Modifying Memory Cells of a Storage Device
US-2022261176-A1 · Aug 18, 2022 · US
Processing of data stored in a memory
US-2022253231-A1 · Aug 11, 2022 · US
Address-coded access towards memory
US-11086796-B2 · Aug 10, 2021 · US
Temporarily storing memory contents
US-11010296-B2 · May 18, 2021 · US
Memory circuit and method of operating a memory circuit
US-10937469-B2 · Mar 2, 2021 · US
Recent patents
Latest publications not already listed above.
Program-instruction-controlled instruction flow supervision
US-10867028-B2 · Dec 15, 2020 · US
Data encryption of a storage area
US-10785031-B2 · Sep 22, 2020 · US
Data encryption and verification between master and slave
US-10649931-B2 · May 12, 2020 · US
Verifying memory access
US-10628084-B2 · Apr 21, 2020 · US
Program-Instruction-Controlled Instruction Flow Supervision
US-2020074076-A1 · Mar 5, 2020 · US
Memory circuit and method of operating a memory circuit
US-2020066312-A1 · Feb 27, 2020 · US
Program-instruction-controlled instruction flow supervision
US-10515206-B2 · Dec 24, 2019 · US
Apparatus and method for detecting integrity violation
US-10514892-B2 · Dec 24, 2019 · US
Address-Coded Access Towards Memory
US-2019370190-A1 · Dec 5, 2019 · US
Memory circuit including overlay memory cells and method of operating thereof
US-10497408-B2 · Dec 3, 2019 · US
Memory circuit including at least one marking cell and method of operating said memory circuit
US-10475520-B2 · Nov 12, 2019 · US
Method of sending data, method of receiving data, master, slave, and master-slave-system
US-2019243789-A1 · Aug 8, 2019 · US
Temporarily storing memory contents
US-2019121736-A1 · Apr 25, 2019 · US
Verifying memory access
US-2019114111-A1 · Apr 18, 2019 · US
Chip and method for detecting a change of a stored data vector
US-10216929-B2 · Feb 26, 2019 · US
System and method for error detection of executed program code employing compressed instruction signatures
US-10114685-B2 · Oct 30, 2018 · US
Memory circuit and method of operating a memory circuit
US-2018158534-A1 · Jun 7, 2018 · US
Memory circuit and method of operating a memory circuit
US-2018151244-A1 · May 31, 2018 · US
Chip and method for detecting a change of a stored data vector
US-2016294414-A1 · Oct 6, 2016 · US
System and method for error detection of executed program code employing compressed instruction signatures
US-2016232050-A1 · Aug 11, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Infineon Technologies Ag | 34 |
| Gammel Berndt | 1 |
| Mangard Stefan | 1 |
| Sonnekalb Steffen | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F11/1004 | 10 |
| G11C7/1006 | 8 |
| G11C7/24 | 6 |
| G11C16/08 | 6 |
| G06F11/1048 | 6 |