Electrostatic discharge with parasitic compensation
US-11316340-B2 · Apr 26, 2022 · US
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Glaser Ulrich patents
Glaser Ulrich is listed as an inventor on 24 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Glaser Ulrich |
| Total patents | 24 |
| First publication | Mar 12, 2015 |
| Latest publication | Apr 26, 2022 |
Notable patents
Publications ranked by popularity score, then publication date.
Active ESD clamp deactivation
US-10971488-B2 · Apr 6, 2021 · US
Electrostatic discharge with parasitic compensation
US-2021036510-A1 · Feb 4, 2021 · US
Active esd clamp deactivation
US-2019244951-A1 · Aug 8, 2019 · US
Central combined active ESD clamp
US-10367350-B2 · Jul 30, 2019 · US
Integrated circuit having an ESD protection structure and photon source
US-9953968-B2 · Apr 24, 2018 · US
Semiconductor device including a diode at least partly arranged in a trench
US-9947648-B2 · Apr 17, 2018 · US
Apparatus and method for generating signals for ESD stress testing an electronic device and system for performing an ESD stress test of an electronic device
US-9891268-B2 · Feb 13, 2018 · US
Central combined active esd clamp
US-2018006448-A1 · Jan 4, 2018 · US
Method of triggering avalanche breakdown in a semiconductor device
US-9705026-B2 · Jul 11, 2017 · US
Recent patents
Latest publications not already listed above.
Apparatus and Method for Generating Signals for ESD Stress Testing an Electronic Device and System for Performing an ESD Stress Test of an Electronic Device
US-2017016945-A1 · Jan 19, 2017 · US
Semiconductor Device Including a Diode at Least Partly Arranged in a Trench
US-2016307885-A1 · Oct 20, 2016 · US
Noise-tolerant active clamp with ESD protection capability in power up mode
US-9413166-B2 · Aug 9, 2016 · US
Method of Triggering Avalanche Breakdown in a Semiconductor Device
US-2016225932-A1 · Aug 4, 2016 · US
Semiconductor device including a diode arranged in a trench
US-9401355-B2 · Jul 26, 2016 · US
Semiconductor device and manufacturing method
US-9287377-B2 · Mar 15, 2016 · US
Semiconductor component and method of triggering avalanche breakdown
US-9263619-B2 · Feb 16, 2016 · US
Semiconductor Device and Manufacturing Method
US-2016035850-A1 · Feb 4, 2016 · US
Combined ESD active clamp for cascaded voltage pins
US-9225163-B2 · Dec 29, 2015 · US
ESD protection
US-9159719-B2 · Oct 13, 2015 · US
Integrated circuit having an esd protection structure and photon source
US-2015249078-A1 · Sep 3, 2015 · US
Noise-tolerant active clamp with esd protection capability in power up mode
US-2015207313-A1 · Jul 23, 2015 · US
Combined esd active clamp for cascaded voltage pins
US-2015124359-A1 · May 7, 2015 · US
Semiconductor Component and Method of Triggering Avalanche Breakdown
US-2015069424-A1 · Mar 12, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Infineon Technologies Ag | 24 |
| Weyers Joachim | 1 |
| Mauder Anton | 1 |
| Hirler Franz | 1 |
| Meiser Andreas | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10D89/611 | 14 |
| H01L27/0255 | 14 |
| H02H9/046 | 8 |
| H10H29/10 | 6 |
| H10D8/411 | 5 |