Wafer-level fan-out package with enhanced performance
US-11069590-B2 · Jul 20, 2021 · US
This page is not indexed by search engines while we improve data quality.
Chadwick Jon patents
Chadwick Jon is listed as an inventor on 26 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Chadwick Jon |
| Total patents | 26 |
| First publication | Sep 29, 2016 |
| Latest publication | Jul 20, 2021 |
Notable patents
Publications ranked by popularity score, then publication date.
Microelectronics package with vertically stacked dies
US-11063021-B2 · Jul 13, 2021 · US
Wafer-level package with enhanced performance and manufacturing method thereof
US-10882740-B2 · Jan 5, 2021 · US
Wafer-level package with enhanced performance
US-10804179-B2 · Oct 13, 2020 · US
Microelectronics package with vertically stacked dies
US-10804246-B2 · Oct 13, 2020 · US
Wafer-level package with enhanced performance
US-10773952-B2 · Sep 15, 2020 · US
Wafer-level packaging for enhanced performance
US-10755992-B2 · Aug 25, 2020 · US
Wafer-level fan-out package with enhanced performance
US-2020115220-A1 · Apr 16, 2020 · US
Wafer-level package with enhanced performance
US-2020102217-A1 · Apr 2, 2020 · US
Microelectronics package with vertically stacked dies
US-2019378819-A1 · Dec 12, 2019 · US
Recent patents
Latest publications not already listed above.
Microelectronics package with vertically stacked dies
US-2019378821-A1 · Dec 12, 2019 · US
Wafer-level package with enhanced performance
US-10486963-B2 · Nov 26, 2019 · US
Wafer-level packaging for enhanced performance
US-10490471-B2 · Nov 26, 2019 · US
Wafer-level package with enhanced performance
US-2019057922-A1 · Feb 21, 2019 · US
Wafer-level packaging for enhanced performance
US-2019013254-A1 · Jan 10, 2019 · US
Wafer-level packaging for enhanced performance
US-2019013255-A1 · Jan 10, 2019 · US
Wafer-level package with enhanced performance
US-10109550-B2 · Oct 23, 2018 · US
Encapsulated dies with enhanced thermal performance
US-10020206-B2 · Jul 10, 2018 · US
Flip chip module with enhanced properties
US-9960145-B2 · May 1, 2018 · US
Wafer-level package with enhanced performance
US-2018044169-A1 · Feb 15, 2018 · US
Wafer-level package with enhanced performance
US-2018047653-A1 · Feb 15, 2018 · US
Wafer-level package with enhanced performance
US-2017334710-A1 · Nov 23, 2017 · US
Encapsulated dies with enhanced thermal performance
US-9613831-B2 · Apr 4, 2017 · US
Flip chip module with enhanced properties
US-2016343592-A1 · Nov 24, 2016 · US
Encapsulated dies with enhanced thermal performance
US-2016284570-A1 · Sep 29, 2016 · US
Encapsulated dies with enhanced thermal performance
US-2016284568-A1 · Sep 29, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Qorvo Us Inc | 24 |
| Rf Micro Devices Inc | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W74/121 | 26 |
| H10W72/0198 | 22 |
| H01L23/3135 | 20 |
| H10W74/019 | 20 |
| H10W90/00 | 18 |