Flip chip module with enhanced properties

Patent metadata

Field	Value
Publication number	US-2016343592-A1
Application number	US-201615229780-A
Country	US
Kind code	A1
Filing date	Aug 5, 2016
Priority date	Mar 25, 2015
Publication date	Nov 24, 2016
Grant date	—

Abstract

A flip chip module having at least one flip chip die is disclosed. The flip chip module includes a carrier having a top surface with a first mold compound residing on the top surface. A first mold compound is disposed on the top surface of the carrier. A first thinned flip chip die resides over a first portion of the first mold compound with interconnects extending through the first portion to the top surface wherein the first portion of the mold compound fills a region between the first flip chip die and the top surface. A second mold compound resides over the substrate and provides a first recess over the first flip chip die wherein the first recess extends to a first die surface of the first flip chip die. A third mold compound resides in the first recess and covers an exposed surface of the flip chip die.

First claim

What is claimed is:

1 . A flip chip module comprising:
a carrier having a top surface; a first mold compound residing on the top surface; a first thinned flip chip die residing over a first portion of the first mold compound and having a first set of interconnects extending through the first portion of the first mold compound to the top surface wherein the first portion of the first mold compound fills a region between the first thinned flip chip die and the top surface; a second mold compound residing over the carrier and in contact with the first mold compound and providing a first recess over the first thinned flip chip die wherein the first recess extends to a first die surface of the first thinned flip chip die; and a third mold compound residing in the first recess and covering a first exposed surface of the first thinned flip chip die.

2 . The flip chip module of claim 1 further comprising a second thinned flip chip die residing over a second portion of the first mold compound and having a second set of interconnects extending through the second portion to the top surface wherein:
the second portion of the first mold compound fills a region between the second thinned flip chip die and the top surface;
the second mold compound provides a second recess over the second thinned flip chip die such that the second recess extends to a second exposed surface of the second thinned flip chip die; and
the third mold compound resides in the second recess and covers the second exposed surface of the second thinned flip chip die.

3 . The flip chip module of claim 2 wherein the first thinned flip chip die provides a microelectromechanical systems (MEMS) component and the second thinned flip chip die does not provide a MEMS component.

4 . The flip chip module of claim 2 wherein the first thinned flip chip die provides an integrated passive device (IPD) and the second thinned flip chip die does not provide an IPD.

5 . The flip chip module of claim 1 further comprising an intact flip chip die having an intact semiconductor substrate, the intact flip chip die residing over a second portion of the first mold compound and having a second set of interconnects extending through the first portion to the top surface wherein:
the second portion of the first mold compound fills a region between the intact flip chip die and the top surface;
the second mold compound covers the intact semiconductor substrate of the intact flip chip die; and
the third mold compound covers an exposed surface of the second mold compound.

6 . The flip chip module of claim 5 wherein the first thinned flip chip die is a MEMS device and the intact flip chip die is a complementary metal oxide semiconductor (CMOS) controller.

7 . The flip chip module of claim 1 wherein the first mold compound, and the second mold compound, and the third mold compound are not the same with each having different physical properties.

8 . The flip chip module of claim 7 wherein the first mold compound includes a ferrite nanopowder to provide magnetic permeability, the second mold compound includes a filler to provide mechanical strength, and the third mold compound includes a thermally conductive additive to provide thermal conductance through the third mold compound.

9 . The flip chip module of claim 1 wherein the first mold compound and the second mold compound are both thermoset polymers with the second mold compound being harder than the first mold compound.

10 . The flip chip module of claim 1 wherein the second mold compound is a thermoset polymer and the third mold compound is a thermoplastic polymer.

11 . The flip chip module of claim 1 wherein the first mold compound and the second mold compound are the same.

12 . The flip chip module of claim 1 wherein the second mold compound and the third mold compound are the same.

13 . The flip chip module of claim 1 wherein the second mold compound has an etched surface to promote adhesion with the third mold compound.

14 . The flip chip module of claim 1 wherein the first exposed surface is the surface of an etch stop layer comprising buried oxide (BOX).

15 . The flip chip module of claim 1 further including a dielectric layer disposed over a top surface of the second mold compound and the first die surface of the first thinned flip chip die.

16 . The flip chip module of claim 15 wherein the dielectric layer is a silicon nitride (SiN) layer.

17 . The flip chip module of claim 1 wherein the third mold compound has a thermal conductivity greater than 2.5 W/m·K and an electrical resistivity greater than 10 3 Ohm-cm.

18 . A method for fabricating a flip chip module comprising:
providing a carrier having a top surface; attaching a flip chip die to the top surface of the carrier by way of interconnects that extend from the flip chip die to the top surface of the carrier; filling space between the flip chip die and the top surface of the carrier with a first mold compound; applying a second mold compound onto the top surface of the carrier to encapsulate the flip chip die; thinning the second mold compound to expose a substrate of the flip chip die; etching the substrate of the flip chip die to provide a thinned flip chip die having an exposed surface at the bottom of a cavity; and applying a third mold compound to substantially fill the cavity of the thinned flip chip die.

19 . The method for fabricating the flip chip module of claim 18 further including disposing a dielectric layer over the exposed surface at the bottom of the cavity before applying the third mold compound.

20 . The method for fabricating the flip chip module of claim 19 wherein the exposed surface at the bottom of the cavity is a surface of an etch stop layer made of BOX and the dielectric layer is made of SiN.

21 . The method for fabricating the flip chip module of claim 18 further including roughening a top surface of the second mold compound before applying the third mold compound.

22 . The method for fabricating the flip chip module of claim 18 wherein the first mold compound is an epoxy resin that has an uncured viscosity of no more than 360 mPa·s when measured with a cone and plate viscometer.

23 . The method for fabricating the flip chip module of claim 18 wherein the first mold compound and the second mold compound are both epoxy resins with the second mold compound being harder than the first.

24 . The method for fabricating the flip chip module of claim 18 wherein the second mold compound is a thermoset polymer and the third mold compound is a thermoplastic with a thermal conductivity greater than 2.5 W/m·K and an electrical resistivity greater than 10 3 Ohm-cm.

25 . A flip chip module comprising:
a carrier having a top surface; a first mold compound residing on the top surface; a first thinned flip chip die residing over a first portion of the first mold compound and having a first set of interconnects extending through the first portion of the first mold compound to the top surface wherein the first portion of the first mold compound fills a region between the first thinned flip chip die and the top surface; a second mold compound residing over the carrier and in contact with the first mold compound and extending to a first die surface of the first thinned flip chip die; and a third mold compound covering a first exposed surface of the first thinned flip chip die.

Assignees

• Qorvo Us Inc

Inventors

• Costa Julio C
• Morris Thomas Scott
• Hammond Jonathan Hale
• Jandzinski David
• Parker Stephen
• Chadwick Jon

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/726

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/00

  Package configurations · CPC title