Methods of forming memory structures for three-dimensional nonvolatile memory
US-2025118547-A1 · Apr 10, 2025 · US
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Armini Silvia patents
Armini Silvia is listed as an inventor on 25 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Armini Silvia |
| Total patents | 25 |
| First publication | Apr 2, 2015 |
| Latest publication | Apr 10, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Method for Forming A Memory Structure for A 3D NAND Flash Memory
US-2025120088-A1 · Apr 10, 2025 · US
Resistless patterning mask
US-11923198-B2 · Mar 5, 2024 · US
Resistless Patterning Mask
US-2021375615-A1 · Dec 2, 2021 · US
Method for forming horizontal nanowires and devices manufactured thereof
US-10790382-B2 · Sep 29, 2020 · US
Selective deposition of metal-organic frameworks
US-10685833-B2 · Jun 16, 2020 · US
Selective deposition of dielectric materials
US-10553480-B2 · Feb 4, 2020 · US
Selective Deposition of Metal-Organic Frameworks
US-2019198391-A1 · Jun 27, 2019 · US
Formation of a transition metal nitride
US-10262896-B2 · Apr 16, 2019 · US
Selective Deposition of Dielectric Materials
US-2018323102-A1 · Nov 8, 2018 · US
Recent patents
Latest publications not already listed above.
Method for forming a field effect transistor device having an electrical contact
US-10090393-B2 · Oct 2, 2018 · US
Method for forming a vertical hetero-stack and a device including a vertical hetero-stack
US-10056253-B2 · Aug 21, 2018 · US
Method for Forming Horizontal Nanowires and Devices Manufactured Thereof
US-2018182868-A1 · Jun 28, 2018 · US
Formation of a transition metal nitride
US-2018047621-A1 · Feb 15, 2018 · US
Method for Forming a Vertical Hetero-stack and a Device Including a Vertical Hetero-stack
US-2017352766-A1 · Dec 7, 2017 · US
Layer deposition on III-V semiconductors
US-9685322-B2 · Jun 20, 2017 · US
Method for Forming a Field Effect Transistor Device Having an Electrical Contact
US-2017141199-A1 · May 18, 2017 · US
Electroless metal deposition on a manganese or manganese nitride barrier
US-9589896-B2 · Mar 7, 2017 · US
Electroless metal deposition on a manganese or manganese nitride barrier
US-2016268208-A1 · Sep 15, 2016 · US
Metallization method for semiconductor structures
US-9437488-B2 · Sep 6, 2016 · US
Metallization Method for Semiconductor Structures
US-2016155664-A1 · Jun 2, 2016 · US
Method for activating a porous layer surface
US-9117666-B2 · Aug 25, 2015 · US
Method for activating a porous layer surface
US-2015170910-A1 · Jun 18, 2015 · US
Method for self-assembly of substrates and devices obtained thereof
US-9000588-B2 · Apr 7, 2015 · US
Layer Deposition on III-V Semiconductors
US-2015091142-A1 · Apr 2, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Imec Vzw | 24 |
| Univ Leuven Kath | 6 |
| Imec | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W20/081 | 8 |
| H10W20/056 | 8 |
| H01L21/76877 | 8 |
| H10W20/425 | 8 |
| H01L23/53238 | 8 |