Layer deposition on III-V semiconductors

Patent metadata

Field	Value
Publication number	US-9685322-B2
Application number	US-201414488857-A
Country	US
Kind code	B2
Filing date	Sep 17, 2014
Priority date	Sep 27, 2013
Publication date	Jun 20, 2017
Grant date	Jun 20, 2017

Abstract

The present disclosure relates to a method ( 100 ) for depositing a layer on a III-V semiconductor substrate, in which this method comprises providing ( 102 ) a passivated III-V semiconductor substrate comprising a III-V semiconductor surface which has a surface passivation layer provided thereon for preventing oxidation of said III-V semiconductor surface. The surface passivation layer comprises a self-assembled monolayer material obtainable by the reaction on the surface of an organic compound of formula R-A, wherein A is selected from SH, SeH, TeH and SiX 3 . X is selected from H, Cl, O—CH 3 , O—C 2 H 5 , and O—C 3 H 2 , and R is a hydrocarbyl, fluorocarbyl or hydrofluorocarbyl comprising from 5 to 20 carbon atoms. The method further comprises thermally annealing ( 107 ) the III-V semiconductor substrate in a non-oxidizing environment such as to decompose the self-assembled monolayer material, and depositing ( 108 ) a layer on the III-V semiconductor surface in the non-oxidizing environment.

First claim

The invention claimed is:

1. A method for depositing a layer on a III-V semiconductor substrate, the method comprising:
(a) providing a passivated III-V semiconductor substrate comprising a III-V semiconductor surface having a surface passivation layer provided thereon for preventing oxidation of said III-V semiconductor surface, said surface passivation layer comprising a self-assembled monolayer material produced by a reaction on said III-V semiconductor surface of an organic compound of formula R-A, wherein A is selected from SH, SeH, TeH and SiX 3 , wherein X is selected from H, Cl, O—CH 3 , O—C 2 H 5 , and O—C 3 H 7 , and wherein R is a hydrocarbyl, fluorocarbyl or hydrofluorocarbyl comprising from 5 to 20 carbon atoms;
(b) thermally annealing said passivated III-V semiconductor substrate in a non-oxidizing environment so as to decompose said self-assembled monolayer material; and
(c) depositing a layer on said III-V semiconductor surface in said non-oxidizing environment.

2. The method according to claim 1 , wherein step (a) self-assembled monolayer material is a reaction product of said surface of an organic compound with formula R—SH.

3. The method according to claim 1 , wherein step (c) layer is an atomic layer.

4. The method according to claim 1 , wherein step (c) layer is a dielectric material layer comprising a material having a static relative permittivity κ higher than silicon-dioxide.

5. The method according to claim 1 , wherein step (b) further comprises exposing said passivated III-V semiconductor substrate to a temperature of 470 K or higher.

6. The method according to claim 1 , wherein step (b) further comprises exposing said passivated III-V semiconductor substrate to water.

7. The method according to claim 1 , wherein step (a) surface passivation layer is produced by (i) removing oxides present on said III-V semiconductor surface and (ii) forming said surface passivation layer on said III-V semiconductor surface.

8. The method according to claim 7 , wherein said forming said surface passivation layer comprises exposing said III-V semiconductor substrate to a fluid comprising an organic compound of formula R-A, wherein A is selected from SH, SeH, TeH and Si X 3 , wherein X is selected from H, Cl, O—CH 3 , O—C 2 H 5 , and O—C 3 H 7 , and wherein R is a hydrocarbyl, fluorocarbyl or hydrofluorocarbyl comprising from 5 to 20 carbon atoms.

9. The method according to claim 8 , wherein said oxide removal comprises performing a wet cleaning process step and wherein steps (i) and (ii) are performed simultaneously.

10. The method according to claim 8 , wherein step (i) comprises performing a dry cleaning process step and wherein steps (i) and (ii) are performed simultaneously.

11. The method according to claim 1 , wherein step (a) passivated III-V semiconductor substrate comprises GaAs, InAs, AlAs, InP and/or InGaAs semiconductor material.

12. The method according to claim 1 , wherein step (a) passivated III-V semiconductor substrate comprises a planar passivated III-V semiconductor substrate.

13. A method for depositing a layer on a III-V semiconductor substrate, said method comprising:
(a) thermally annealing a passivated III-V semiconductor substrate in a non-oxidizing environment so as to decompose a self-assembled monolayer material present on said passivated III-V semiconductor substrate, said passivated III-V semiconductor substrate comprising a III-V semiconductor surface having a surface passivation layer provided thereon for preventing oxidation of said III-V semiconductor surface, said surface passivation layer comprising said self-assembled monolayer material produced by the reaction on said III-V semiconductor surface of an organic compound of formula R-A, wherein A is selected from SH, SeH, TeH and SiX 3 , wherein X is selected from H, Cl, O—CH 3 , O—C 2 H 5 , and O—C 3 H 7 , and wherein R is a hydrocarbyl, fluorocarbyl or hydrofluorocarbyl comprising from 5 to 20 carbon atoms; and
(b) depositing a layer on said III-V semiconductor surface in said non-oxidizing environment.

Assignees

• Imec Vzw

Inventors

• Adelmann Christoph
• Armini Silvia

Classifications

• H10P70/15

  by wet cleaning only (H10P70/52 takes precedence) · CPC title

• H10P70/12

  by dry cleaning only (H10P70/52 takes precedence) · CPC title

• H10P14/6506

  Formation of intermediate materials · CPC title

• H10P14/6502

  of treatments performed before formation of the materials · CPC title

• H10P14/6326

  Deposition processes · CPC title