Backend of line (BEOL) compatible high current density access device for high density arrays of electronic components

Patent metadata

Field	Value
Publication number	US-9812638-B2
Application number	US-72774610-A
Country	US
Kind code	B2
Filing date	Mar 19, 2010
Priority date	Mar 19, 2010
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

A device has a M 8 XY 6 layer in between a first conductive layer on the top and a second conductive layer on the bottom, wherein (i) M includes at least one element selected from the following: Cu, Ag, Li, and Zn, (ii) X includes at least one Group XIV element, and (iii) Y includes at least one Group XVI element. Another device has M a X b Y c material contacted on opposite sides by respective layers of conductive material, wherein: (i) M includes at least one element selected from the following: Cu, Ag, Li, and Zn, (ii) X includes at least one Group XIV element, and (iii) Y includes at least one Group XVI element, and a is in the range of 48-60 atomic percent, b is in the range of 4-10 atomic percent, c is in the range of 30-45 atomic percent, and a+b+c is at least 90 atomic percent.

First claim

The invention claimed is:

1. A device, comprising:
a first conductive layer;
a second conductive layer comprising a tungsten layer; and
a M 8 XY 6 layer sandwiched in between said first conductive layer on top and said second conductive layer on bottom, wherein
(i). M includes at least one element selected from the group consisting of Cu, Ag, Li, and Zn,
(ii). X includes at least one Group XIV element, and
(iii). Y includes at least one Group XVI element,
wherein said first conductive layer, second conductive layer and M 8 XY 6 layer are in proximity to each other, thereby allowing current to pass through.

2. The device of claim 1 , wherein X includes at least one element selected from the group consisting of Ge, Si, Sn, and C.

3. The device of claim 1 , wherein Y includes at least one element selected from the group consisting of Se, S, O, and Te.

4. The device of claim 1 , wherein said first conductive layer is any of the following: a Cu-containing layer and a Cu 3 Ge layer.

5. The device of claim 1 , wherein M comprises a plurality of elements M a1 . . . M an , and a 1 + . . . +a n =8.

6. The device of claim 1 , wherein said M8XY6 is any of the following: Cu 8 GeS 6 , Cu 8 GeSe 6 and Ag 4.7 Cu 3.3 GeS 6 .

7. A device, comprising:
an M a X b Y c material contacted on opposite sides by respective layers of conductive material, wherein at least one of said conductive layers includes an electrode that is inert with respect to the M a X b Y c material, and wherein:
(i). M includes at least one element selected from the group consisting of Cu, Ag, Li, and Zn,
(ii). X includes at least one Group XIV element,
(iii). Y includes at least one Group XVI element, and
wherein a is in the range of 48-60 atomic percent, b is in the range of 4-10 atomic percent, c is in the range of 30-45 atomic percent, and a+b+c is at least 90 atomic percent, and wherein said M a X b Y c material and said layers of conductive material are in proximity to each other, thereby allowing current to pass through.

8. The device of claim 7 , wherein X includes at least one element selected from the group consisting of Ge, Si, Sn, and C.

9. The device of claim 7 , wherein Y includes at least one element selected from the group consisting of Se, S, O, and Te.

10. The device of claim 7 , wherein the M a X b Y c material is an argyrodite material of the formula M 8 X 1 Y 6 .

11. The device of claim 10 , wherein said M8XY6 is any of the following: Cu8GeS6, Cu 8 GeSe 6 and Ag 4.7 Cu 3.3 GeS 6 .

12. The device of claim 7 , wherein an other one of said conductive layers is any of the following: a Cu-containing layer and a Cu 3 Ge layer.

13. The device of claim 7 , wherein an amount of current passed by said device varies by a factor of at least 10 6 in response to varying the applied voltage by 0.5 V.

14. The device of claim 7 , further including a first dielectric layer between the M a X b Y c material and one of the conductive layers.

15. The device of claim 14 , further including a second dielectric layer between the M a X b Y c material and the other one of the conductive layers.

16. The device of claim 7 , wherein the M a X b Y c material includes both Cu and Ag, wherein each of Cu and Ag constitute at least 1 atomic percent of the M a X b Y c material.

17. The device of claim 7 , further including a dopant, the dopant being at least one element selected from the group consisting of N, P, Zn, W, Sb, F, Cl, Br and I, the dopant constituting at least 1 atomic percent but less than 10 atomic percent of the M a X b Y c material.

18. An apparatus, comprising:
a first device as described by claim 7 ; and
a second device as described by claim 7 , wherein the first and second devices are in series.

19. A crossspoint memory array, comprising:
bit lines;
word lines; and
crosspoint elements at the intersection of the bit lines and the word lines, wherein each crosspoint element includes a memory element and a device as described by claim 7 .

20. The device of claim 19 , wherein the amount of current passed by each device varies by a factor of at least 10 6 in response to varying the applied voltage by 0.5 V.

21. The array of claim 19 , wherein each memory element includes a phase change memory material.

Assignees

• Bethune Donald S
• Gopalakrishnan Kailash
• Kellock Andrew J
• Shenoy Rohit S
• Globalfoundries Inc

Inventors

• Bethune Donald S
• Gopalakrishnan Kailash
• Kellock Andrew J
• Shenoy Rohit S

Classifications

• H01L45/00 Primary

  Electricity · mapped topic

• H01L45/06

  Electricity · mapped topic

• H01L45/1233

  Electricity · mapped topic

• H01L27/2409

  Electricity · mapped topic

• H10N70/826

  adapted for essentially vertical current flow, e.g. sandwich or pillar type devices · CPC title