Selection device and nonvolatile memory cell including the same and method of fabricating the same

Patent metadata

Field	Value
Publication number	US-9324944-B2
Application number	US-201313856838-A
Country	US
Kind code	B2
Filing date	Apr 4, 2013
Priority date	Apr 4, 2012
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

A selection device, non-volatile memory cell, and method of fabricating the same. The selection device employs an oxide laminate structure including a tunneling oxide layer and a metal-cluster oxide layer between first and second electrodes, enabling a high selection ratio and sufficient on-current density to allow program data recordation in a memory cell at relatively low voltage. The non-volatile memory cell includes the selection device electrically connected to a resistive random access memory device, including a resistance change layer, enabling suppression of current leakage from a non-selected adjacent memory cell in an array structure. In the method of fabrication, a tunneling oxide layer is formed by depositing and oxidizing a metal layer to control oxygen vacancy density in the metal-cluster oxide layer, and an interface oxide layer is formed in the tunneling oxide layer by doping of metal-clusters in the metal-cluster oxide layer, improving on-current density of the selection device.

First claim

What is claimed is:

1. A unit memory cell comprising:
a first electrode;
a second electrode, wherein the second electrode is a reactive metal electrode;
a tunneling oxide layer interposed between the first electrode and the second electrode;
a first metal cluster oxide layer interposed between the tunneling oxide layer and the second electrode, and
wherein the tunneling oxide layer comprises an insulating oxide layer, and an interface oxide layer formed by doping of a metal contained in the first metal cluster oxide layer into the tunneling oxide layer to adjoin the first metal cluster oxide layer.

2. The unit memory cell according to claim 1 , wherein the interface oxide layer is an oxide layer into which a metal having a different valence electron number than the metal contained in the tunneling oxide layer is diffused.

3. The selection device according to claim 1 , wherein the insulating oxide layer has a higher work function than the first metal cluster oxide layer or the same work function as that of the first metal cluster oxide layer.

4. The unit memory cell according to claim 1 , wherein the tunneling oxide layer contains TiO 2 , Al 2 O 3 or HfO 2 .

5. The unit memory cell according to claim 1 ,
wherein the first metal cluster oxide layer contains TaO x , TiO x or HfO x (0.1≦X≦1).

6. The unit memory cell according to claim 1 , wherein the tunneling oxide layer contains TiO 2 , and the first metal cluster oxide layer contains TaO x (0.1≦X≦1).

7. The unit memory cell according to claim 1 , further comprising:
a second metal cluster oxide layer disposed between the tunneling oxide layer and the first electrode.

8. A unit memory cell comprising:
a selection device comprising a tunneling oxide layer, and a metal cluster oxide layer on the tunneling oxide layer; and
a resistive random access memory device electrically connected to the selection device and comprising a resistance change layer and a reactive metal electrode on the metal cluster oxide layer.

9. The unit memory cell according to claim 8 , wherein the reactive metal electrode contains a metal having an electronegativity of 1.0 to 1.5 eV.

10. The unit memory cell according to claim 8 , wherein the resistance change layer is formed at an interface between the metal cluster oxide layer and the reactive metal electrode.

Assignees

• Hwang Hyunsang
• Lee Wootae
• Kwangju Inst Sci & Tech

Inventors

• Hwang Hyunsang
• Lee Wootae

Classifications

• H01L45/146

  Electricity · mapped topic

• H01L45/145 Primary

  Electricity · mapped topic

• H01L27/2418

  Electricity · mapped topic

• H01L45/1233

  Electricity · mapped topic

• H01L45/00

  Electricity · mapped topic