Methods of forming diodes

Patent metadata

Field	Value
Publication number	US-9520478-B2
Application number	US-201514959884-A
Country	US
Kind code	B2
Filing date	Dec 4, 2015
Priority date	Jun 18, 2008
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.

First claim

We claim:

1. A method of forming a diode, comprising:
etching an opening that extends through an insulative material and to a conductive base;
forming at least one sidewall spacer along sidewalls of the opening to narrow the opening, the base being exposed along a bottom of the narrowed opening;
dispersing seed material along the bottom of the narrowed opening; and growing pedestals from the dispersed seed material;
removing the at least one sidewall spacer after dispersing the seed material;
depositing one or more layers across the pedestals to form the first electrode of the diode; and
forming a second electrode over said one or more layers to form the diode.

2. The method of claim 1 wherein the dispersed seed material consists of nanocrystalline seeds.

3. The method of claim 1 wherein the one or more pedestals are comprised of the same composition as the base.

4. The method of claim 1 wherein the one or more pedestals comprise at least one composition that is not comprised by the base.

5. The method of claim 1 wherein the one or more layers are at least two layers.

6. The method of claim 1 wherein the etching the opening comprises anisotropically etching.

Assignees

• Micron Technology Inc

Inventors

• Sandhu Gurtej S
• Mouli Chandra

Classifications

• H10P14/40

  of conductive or resistive materials · CPC title

• H10D64/011

  of electrodes ohmically coupled to a semiconductor · CPC title

• H10D1/716

  having vertical extensions · CPC title

• H10D64/23

  Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes · CPC title

• H10D62/123

  comprising junctions · CPC title