Surface-treated copper foil, copper foil with carrier, substrate, resin substrate, printed wiring board, copper clad laminate and method for producing printed wiring board

US2018279482A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018279482-A1
Application numberUS-201815910499-A
CountryUS
Kind codeA1
Filing dateMar 2, 2018
Priority dateJul 23, 2013
Publication dateSep 27, 2018
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A surface-treated copper foil is capable of imparting the profile shape of the substrate surface after removal of the copper foil, the profile shape maintaining fine wiring formability and achieving satisfactory adhesion of electroless copper plating coating. A resin substrate is provided with a profile shape of the surface maintaining fine wiring formability and achieving satisfactory adhesion of electroless copper plating coating. The surface-treated copper foil has a surface-treated layer formed on a copper foil, and the surface roughness Sz of the surface of the surface-treated layer is 2 to 6 μm.

First claim

Opening claim text (preview).

1 . A substrate prepared by bonding a surface-treated copper foil wherein a surface treated layer is formed on a copper foil, wherein the surface roughness Sz of the surface of the surface-treated layer is 2 to 6 μm, the surface-treated copper foil optionally having a resin layer on the surface-treated layer, via the surface-treated layer side thereof, to a substrate, and by removing the surface-treated copper foil, or a substrate prepared by bonding a copper foil with carrier, the copper foil with carrier comprising a carrier, an intermediate layer and an ultra-thin copper layer in this order, the ultra-thin copper layer being a surface-treated copper foil wherein a surface treated layer is formed on a copper foil, wherein the surface roughness Sz of the surface of the surface-treated layer is 2 to 6 μm and optionally having a resin layer, via the ultra-thin copper layer side thereof, to a substrate, and by removing the carrier from the copper foil with carrier and removing the ultra-thin copper layer which is the surface-treated copper foil, wherein at least one of the following (1) to (3) is satisfied: (1) the surface roughness Sz of the surface, on the copper foil removal side, of the substrate is 1 to 5 μm, (2) the ratio B/A of the three-dimensional surface area B to the two-dimensional surface area A of surface, on the copper foil removal side of the substrate, is 1.01 to 1.5, or (3) the black area rate of the surface, on the copper foil removal side, of the substrate is 10 to 50%, and the average value of the diameters of the holes of the surface, on the copper foil removal side of the substrate, is 0.03 to 1.0 μm. 2 . A resin substrate wherein at least one of the following (1) to (3) is satisfied: (1) a surface roughness Sz of the surface of the resin substrate is 1 to 5 μm, (2) the ratio B/A of the three-dimensional surface area B to the two-dimensional surface area A of the surface of the resin substrate is 1.01 to 1.5, or (3) the black area rate of the surface of the resin substrate is 10 to 50%, and the average value of the diameters of the holes of the surface of the resin substrate is 0.03 to 1.0 μm. 3 . A method for producing a printed wiring board comprising: a step of preparing the resin substrate according to claim 2 , and a step of forming a circuit on the surface of the resin substrate. 4 . A method for producing a printed wiring board comprising: a step of preparing the resin substrate according to claim 2 , and a step of producing a printed wiring board with the resin substrate. 5 . A copper clad laminate comprising the resin substrate according to claim 2 . 6 . A method for producing a printed wiring board, comprising: a step of preparing a surface-treated copper foil, or a copper foil with carrier comprising a carrier, an intermediate layer and an ultra-thin copper layer in this order, and a resin substrate; a step of laminating the surface-treated copper foil, via the surface-treated layer side thereof, on the resin substrate, or a step of laminating the copper foil with carrier, via the ultra-thin copper layer side thereof, on the resin substrate, and then peeling the carrier of the copper foil with carrier; a step of obtaining the resin substrate according to claim 2 by removing the surface-treated copper foil or removing the ultra-thin copper layer on the resin substrate; and a step of forming a circuit on the surface of the resin substrate with the surface-treated copper foil or the ultra-thin copper layer removed therefrom. 7 . A method for producing a printed wiring board, comprising: a step of forming a copper clad laminate by laminating a surface-treated copper foil via the surface-treated layer side thereof, on the resin substrate according to claim 2 , or by laminating a copper foil with carrier comprising a carrier, an intermediate layer and an ultra-thin copper layer in this order, via the ultra-thin copper layer side thereof, on the resin substrate according to claim 42 , and then, peeling the carrier of the copper foil with carrier; and a step of subsequently forming a circuit by a semi-additive method, a subtractive method, a partly additive method or a modified semi-additive method. 8 . A method for producing a printed wiring board, comprising: a step of preparing a metal foil with circuit formed on the surface thereof, or a step of forming a circuit on the surface on the ultra-thin copper layer side of a copper foil with carrier constituted by laminating a carrier, an intermediate layer and an ultra-thin copper layer in this order; a step of forming the resin substrate according to claim 2 on the surface of the metal foil, or on the surface on the ultra-thin copper layer side of a copper foil with carrier, so as for the circuit to be embedded; a step of forming a circuit on the resin layer; and a step of exposing the circuit formed on the surface of the metal foil or on the surface of the copper foil with carrier and embedded in the resin substrate by removing the metal foil or the copper foil with carrier. 9 . A surface-treated copper foil, wherein at least one of the following (1) to (3) is satisfied: (1) when the surface-treated copper foil is bonded, via the surface-treated layer side thereof, to a resin substrate and the surface-treated copper foil is removed, the surface roughness Sz of the surface on the copper foil removal side of the resin substrate is 1 to 3 μm, (2) when the surface-treated copper foil is bonded, via the surface-treated layer side thereof, to a resin substrate and the surface-treated copper foil is removed, the black area rate of the surface on the copper foil removal side of the resin substrate is 10 to 45%, (3) when the surface-treated copper foil is bonded, via the surface-treated layer side thereof, to a resin substrate and the surface-treated copper foil is removed, the average value of the diameters of holes of the surface on the copper foil removal side of the resin substrate is 0.03 to 0.7 μm.

Assignees

Inventors

Classifications

  • of synthetic resin · CPC title

  • PCBs, i.e. printed circuit boards · CPC title

  • by plating · CPC title

  • Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating · CPC title

  • characterised by a particular shape of the outline of the cross-section of a continuous layer; characterised by a layer with cavities or internal voids {(foam layer B32B5/18; layer of synthetic resin characterised by fillers that create voids or cavities B32B27/205); characterised by an apertured layer} · CPC title

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What does patent US2018279482A1 cover?
A surface-treated copper foil is capable of imparting the profile shape of the substrate surface after removal of the copper foil, the profile shape maintaining fine wiring formability and achieving satisfactory adhesion of electroless copper plating coating. A resin substrate is provided with a profile shape of the surface maintaining fine wiring formability and achieving satisfactory adhesion…
Who is the assignee on this patent?
Jx Nippon Mining & Metals Corp
What technology area does this patent fall under?
Primary CPC classification H05K3/025. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 27 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).