Semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice

Patent metadata

Field	Value
Publication number	US-10468245-B2
Application number	US-201815916766-A
Country	US
Kind code	B2
Filing date	Mar 9, 2018
Priority date	Mar 9, 2018
Publication date	Nov 5, 2019
Grant date	Nov 5, 2019

Abstract

A semiconductor device may include a substrate including a first Group IV semiconductor having a recess therein, an active layer comprising a Group III-V semiconductor within the recess, and a buffer layer between the substrate and active layer and comprising a second Group IV semiconductor. The semiconductor device may further include an impurity and point defect blocking superlattice layer adjacent the buffer layer.

First claim

That which is claimed is:

1. A semiconductor device comprising:
a substrate comprising a first Group IV semiconductor having a recess therein;
an active layer comprising a Group III-V semiconductor within the recess;
a buffer layer between the substrate and the active layer and comprising a second Group IV semiconductor;
a first impurity and point defect blocking superlattice layer between and in contact with the substrate and the buffer layer; and
a second impurity and point defect blocking superlattice layer between and in contact with the buffer layer and the active layer.

2. The semiconductor device of claim 1 wherein at least one of the first and second impurity and point defect blocking superlattice layers comprises a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

3. The semiconductor device of claim 2 wherein the base semiconductor layers comprise silicon monolayers.

4. The semiconductor device of claim 2 wherein the base semiconductor layers comprise germanium.

5. The semiconductor device of claim 2 wherein the at least one non-semiconductor monolayer comprises at least one of oxygen, nitrogen, fluorine, carbon and carbon-oxygen.

6. The semiconductor device of claim 1 wherein the first Group IV semiconductor comprises silicon.

7. The semiconductor device of claim 1 wherein the second Group IV semiconductor comprises germanium.

8. The semiconductor device of claim 1 wherein the Group III-V semiconductor comprises InP.

9. The semiconductor device of claim 1 further comprising:
a channel layer on the active layer;
a gate on the channel layer; and
a source and a drain on opposite sides of the gate.

10. The semiconductor device of claim 9 wherein the Group III-V semiconductor of the active layer comprises a first Group III-V semiconductor; and wherein the channel layer comprises a second Group III-V semiconductor different than the first Group III-V semiconductor.

11. The semiconductor device of claim 10 wherein the second Group III-V semiconductor comprises InGaAs.

12. The semiconductor device of claim 10 wherein the source and drain also comprise the second Group III-V semiconductor.

13. A semiconductor device comprising:
a substrate comprising a first Group IV semiconductor having a recess therein;
an active layer comprising a Group III-V semiconductor within the recess;
a buffer layer between the substrate and the active layer and comprising a second Group IV semiconductor;
a first impurity and point defect blocking superlattice layer between and in contact with the substrate and the buffer layer and comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base monolayers of the first Group IV semiconductor defining a first base semiconductor portion, and at least one first non-semiconductor monolayer constrained within a crystal lattice of adjacent first base semiconductor portions; and
a second impurity and point defect blocking superlattice layer between and in contact with the buffer layer and the active layer and comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base monolayers of the second Group IV semiconductor defining a second base semiconductor portion, and at least one second non-semiconductor monolayer constrained within a crystal lattice of adjacent second base semiconductor portions.

14. The semiconductor device of claim 13 wherein the first and second non-semiconductor monolayers comprise at least one of oxygen, nitrogen, fluorine, carbon and carbon-oxygen.

15. The semiconductor device of claim 13 wherein the first Group IV semiconductor comprises silicon.

16. The semiconductor device of claim 13 wherein the second Group IV semiconductor comprises germanium.

17. The semiconductor device of claim 13 wherein the Group III-V semiconductor comprises InP.

18. The semiconductor device of claim 13 further comprising:
a channel layer on the active layer;
a gate on the channel layer; and
a source and a drain on opposite sides of the gate.

19. The semiconductor device of claim 18 wherein the Group III-V semiconductor of the active layer comprises a first Group III-V semiconductor; and wherein the channel layer comprises a second Group III-V semiconductor different than the first Group III-V semiconductor.

20. The semiconductor device of claim 19 wherein the second Group III-V semiconductor comprises InGaAs.

21. The semiconductor device of claim 19 wherein the source and drain also comprise the second Group III-V semiconductor.

22. A semiconductor device comprising:
a substrate comprising a first Group IV semiconductor having a recess therein;
an active layer comprising a Group III-V semiconductor within the recess;
a buffer layer between the substrate and the active layer and comprising a second Group IV semiconductor;
a first impurity and point defect blocking superlattice layer between and in contact with the substrate and the buffer layer; and
a second impurity and point defect blocking superlattice layer between and in contact with the buffer layer and the active layer;
the first and second impurity and point defect blocking superlattice layers each comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

23. The semiconductor device of claim 22 wherein the base semiconductor layers comprise silicon monolayers, and the at least one non-semiconductor monolayer comprises oxygen.

24. The semiconductor device of claim 22 wherein the first Group IV semiconductor comprises silicon, and the second Group IV semiconductor comprises germanium.

25. The semiconductor device of claim 22 wherein the Group III-V semiconductor comprises InP.

Assignees

• Atomera Inc

Inventors

• Weeks Keith Doran
• Cody Nyles Wynn
• Hytha Marek
• Mears Robert J
• Stephenson Robert John

Classifications

• H10P95/408

  of Group III-V semiconductors, e.g. to render them semi-insulating · CPC title

• H10P14/3252 Primary

  Alternating layers, e.g. superlattice · CPC title

• H10P14/271

  characterised by the preparation of substrate for selective deposition · CPC title

• H10P14/3421

  Arsenides · CPC title

• H10P14/3418

  Phosphides · CPC title