Semiconductor device including resonant tunneling diode structure having a superlattice

Patent metadata

Field	Value
Publication number	US-10453945-B2
Application number	US-201715670231-A
Country	US
Kind code	B2
Filing date	Aug 7, 2017
Priority date	Aug 8, 2016
Publication date	Oct 22, 2019
Grant date	Oct 22, 2019

Abstract

A semiconductor device may include at least one double-barrier resonant tunneling diode (DBRTD). The at least one DBRTD may include a first doped semiconductor layer and a first barrier layer on the first doped semiconductor layer and including a superlattice. The superlattice may include stacked groups of layers, each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The at least one DBRTD may further include an intrinsic semiconductor layer on the first barrier layer, a second barrier layer on the intrinsic semiconductor layer, and a second doped semiconductor layer on the second superlattice layer.

First claim

That which is claimed is:

1. A semiconductor device comprising:
at least one double-barrier resonant tunneling diode (DBRTD) comprising:
a first doped semiconductor layer comprising silicon;
a first barrier layer on the first doped semiconductor layer and comprising a first superlattice, the first superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
an intrinsic semiconductor layer on the first barrier layer comprising at least one of silicon and germanium;
a second barrier layer on the intrinsic semiconductor layer; and
a second doped semiconductor layer on the second barrier layer comprising silicon.

2. The semiconductor device of claim 1 wherein the second barrier layer comprises a second superlattice, the second superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained with a crystal lattice of adjacent base semiconductor portions.

3. The semiconductor device of claim 2 wherein the second doped semiconductor layer comprises a single crystal semiconductor layer.

4. The semiconductor device of claim 1 wherein the second barrier layer comprises an oxide layer.

5. The semiconductor device of claim 4 wherein the second doped semiconductor layer comprises a polycrystalline semiconductor layer.

6. The semiconductor device of claim 1 wherein the first and second doped semiconductor layers have a same dopant conductivity type.

7. The semiconductor device of claim 1 wherein the first and second doped semiconductor layers have opposite dopant conductivity types.

8. The semiconductor device of claim 1 wherein the at least one DBRTD comprises a pair of DBRTDs connected in series to define a monostable-bistable transition logic element (MOBILE).

9. The semiconductor device of claim 1 wherein the at least one non-semiconductor monolayer comprises oxygen, and wherein the plurality of stacked base semiconductor monolayers each comprises silicon.

10. A semiconductor device comprising:
at least one double-barrier resonant tunneling diode (DBRTD) comprising
a first doped semiconductor layer;
a first barrier layer on the first doped semiconductor layer and comprising a first superlattice, the first superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
an intrinsic semiconductor layer on the first barrier layer;
a second barrier layer on the intrinsic semiconductor layer, the second barrier layer comprising a second superlattice, the second superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions; and
a second doped semiconductor layer on the second barrier layer.

11. The semiconductor device of claim 10 wherein the first and second doped semiconductor layers each comprises silicon, and wherein the intrinsic layer comprises at least one of silicon and germanium.

12. The semiconductor device of claim 10 wherein the second doped semiconductor layer comprises a single crystal semiconductor layer.

13. The semiconductor device of claim 10 wherein the first and second doped semiconductor layers have a same dopant conductivity type.

14. The semiconductor device of claim 10 wherein the first and second doped semiconductor layers have opposite dopant conductivity types.

15. The semiconductor device of claim 10 wherein the at least one DBRTD comprises a pair of DBRTDs connected in series to define a monostable-bistable transition logic element (MOBILE).

16. A semiconductor device comprising:
at least one double-barrier resonant tunneling diode (DBRTD) comprising
a first doped semiconductor layer;
a first barrier layer on the first doped semiconductor layer and comprising a first superlattice, the first superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
an intrinsic semiconductor layer on the first barrier layer;
a second barrier layer on the intrinsic semiconductor layer comprising an oxide layer; and
a second doped semiconductor layer on the second barrier layer.

17. The semiconductor device of claim 16 wherein the first and second doped semiconductor layers each comprises silicon, and wherein the intrinsic layer comprises at least one of silicon and germanium.

18. The semiconductor device of claim 16 wherein the second doped semiconductor layer comprises a polycrystalline semiconductor layer.

19. The semiconductor device of claim 16 wherein the first and second doped semiconductor layers have the same dopant conductivity type.

20. The semiconductor device of claim 16 wherein the first and second doped semiconductor layers have opposite dopant conductivity types.

21. The semiconductor device of claim 16 wherein the at least one DBRTD comprises a pair of DBRTDs connected in series to define a monostable-bistable transition logic element (MOBILE).

22. A semiconductor device comprising:
at least one double-barrier resonant tunneling diode (DBRTD) comprising:
a first doped semiconductor layer;
a first barrier layer on the first doped semiconductor layer and comprising a first superlattice, the first superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
an intrinsic semiconductor layer on the first barrier layer;
a second barrier layer on the intrinsic semiconductor layer comprising an oxide; and
a second doped semiconductor layer on the second barrier layer.

23. The semiconductor device of claim 22 wherein the second doped semiconductor layer comprises a polycrystalline semiconductor layer.

Assignees

• Atomera Inc

Inventors

• Mears Robert J
• Takeuchi Hideki
• Hytha Marek

Classifications

• H01L29/152

  Electricity · mapped topic

• H01L29/8618

  Electricity · mapped topic

• H01L29/1054

  Electricity · mapped topic

• H01L27/092

  Electricity · mapped topic

• H01L29/882

  Electricity · mapped topic